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Cyber-Physical Systems Virtual Organization
Read-only archive of site from September 29, 2023.
CPS-VO
CMOS technology
biblio
Standard CMOS Integrated Ultra-Compact Micromechanical Oscillating Active Pixel Arrays
Submitted by aekwall on Fri, 07/29/2022 - 4:32pm
CMOS technology
oscillating behaviors
Titanium nitride
Resonators
resonant pixels
phase noise
Oscillators
nonlinear vibration
Micromechanical devices
CMOS-MEMS
pubcrawl
BEOL
arrays
Vibrations
Resonant frequency
standards
privacy
composability
Resiliency
Metrics
biblio
Quantum computing with CMOS technology
Submitted by grigby1 on Thu, 07/14/2022 - 3:42pm
quantum computing
pubcrawl
Hardware
Scalability
Buildings
Technological innovation
information processing
drugs
CMOS
CMOS technology
Silicon
spins
Transistors
VLSI
quantum computing security
biblio
A Hardware Implementation of the SHA2 Hash Algorithms Using CMOS 28nm Technology
Submitted by aekwall on Mon, 03/29/2021 - 12:06pm
Hardware Implementation
SHA2 Hash algorithms
SHA-256
secure hash algorithm 2
hardware hash accelerator
CMOS 28nm technology
hash algorithms
Hash functions
adders
field programmable gate arrays
Compositionality
pubcrawl
CMOS technology
CMOS integrated circuits
Resiliency
Program processors
Hardware
Cryptography
biblio
Reduced-Complexity Singular Value Decomposition For Tucker Decomposition: Algorithm And Hardware
Submitted by aekwall on Mon, 02/15/2021 - 4:45pm
singular value decomposition
decomposition
Tucker decomposition
tensors
tensor algorithms
size 28.0 nm
resource-constrained hardware platforms
reduced-complexity SVD scheme
power 37.6 mW
iterative self-multiplication
high-dimensional data processing
big data analysis
SVD
Big Data
Data-Intensive Applications
hardware architecture
Compositionality
CMOS technology
CMOS integrated circuits
cyber physical systems
data analysis
Metrics
Iterative methods
pubcrawl
machine learning
biblio
Capacitive Multi-Channel Security Sensor IC for Tamper-Resistant Enclosures
Submitted by aekwall on Mon, 03/25/2019 - 9:56am
CMOS integrated circuits
sensor security
time 19.7 ms
tamper-resistant enclosures
SNR
size 350.0 nm
sensor fusion
Semiconductor device measurement
physical interaction
physical attacks
noise figure 94.6 dB
integrated circuits
integrated circuit packaging
Electrodes
electrode matrix
CMOS technology
security
Capacitors
capacitive touch technology
capacitive sensors
capacitive multichannel security sensor IC
capacitance measurement
capacitance 460.0 aF
capacitance 35.0 aF
Capacitance
Metrics
composability
pubcrawl
Human behavior
Resiliency
embedded devices
biblio
Robust IoT communication physical layer concept with improved physical unclonable function
Submitted by grigby1 on Mon, 06/11/2018 - 3:48pm
Ring Oscillator
Microelectronics Security
Physical Unclonable Function
pubcrawl
PUF
PUF-interfacing communication physical layer hardware
random identification hardware
reliability problems
resilience
Resiliency
Metrics
robust IoT communication physical layer
robust IoT communication physical layer concept
robust monitoring concepts
Robustness
size 65.0 nm
Spectral analysis
suitable physics
tuning
computer network security
Asia
Bandwidth
client-to-cloud communication physical layer
Cloud Computing
cloud-interfacing point
CMOS
CMOS technology
composability
aging
Conferences
generated PUF word
Hardware
hardware concepts
improved physical unclonable function
Internet of Things
IoT concept
IoT-cloud-based communication
biblio
Fully integrable current-mode feedback suppressor as an analog countermeasure against CPA attacks in 40nm CMOS technology
Submitted by grigby1 on Wed, 02/21/2018 - 1:41pm
Power demand
Logic gates
Metrics
Microelectronic Security
MTD improvement
on-chip analog-level CPA countermeasure
Power Analysis Attack
power aware computing
power consumption
IoT
pubcrawl
resilience
Resiliency
sensible data security
side channel attack
size 40 nm
system-on-chip
ultraconstrained IoT smart devices
CPA
circuit feedback
CMOS
CMOS analogue integrated circuits
CMOS logic circuits
CMOS technology
composability
correlation coefficient
correlation power analysis
Analog-level
CPA attacks
CPA-resistant cryptographic devices
Cryptography
current-mode
current-mode circuits
data-dependency
fully integrable current-mode feedback suppressor
Internet of Things
biblio
Analog cellular neural network for application in physical unclonable functions
Submitted by grigby1 on Thu, 04/20/2017 - 12:41pm
Resiliency
Monte Carlo simulation
network on chip
network on chip security
neural chips
Physically Unclonable Function (PUF)
physical unclonable function design
process variation
pubcrawl
PUF instances
Monte Carlo methods
Scalability
secret key generation
Semiconductor device modeling
size 45 nm
Trajectory
unclonable core module
unpolarized Gaussian-shaped distribution
word length 100 bit
CMOS technology
analogue circuits
cellular neural nets
Cellular Neural Network (CNN)
Cellular neural networks
challenge-response security system
circuit dynamical behavior
CMOS analogue integrated circuits
CMOS integrated circuits
analog cellular neural network
composability
Cryptography
device identification-authentication
Hamming distance
Hardware
Hardware Security
integrated circuit design
Integrated circuit modeling
biblio
"Improved serial 2D-DWT processor for advanced encryption standard"
Submitted by grigby1 on Mon, 02/13/2017 - 1:08pm
Hardware
size 65 nm
serialized DT processor
serial 2D-DWT processor
secured image processing
RTL-GDSII
Quantization (signal)
pubcrawl170102
low power ASIC
lifting scheme algorithm
image data security
Image coding
high speed encryption
advanced encryption standard
frequency 333 MHz
encryption
DWT
discrete wavelet transforms
discrete wavelet transform
data compression
Cryptography
compression ratio
CMOS technology
ASIC circuit design
application specific integrated circuits
AES
