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Cyber-Physical Systems Virtual Organization
Read-only archive of site from September 29, 2023.
CPS-VO
built-in self-test
biblio
Secured Test Pattern Generators for BIST
Submitted by grigby1 on Fri, 07/29/2022 - 8:44am
intellectual property
pattern locks
TPG
overproduction
BIST
logic locking
design for testability
built-in self-test
Hardware Security
reverse engineering
pubcrawl
side-channel attacks
integrated circuits
privacy
Scalability
Hardware
Resiliency
resilience
Human behavior
biblio
An Exploration of Microprocessor Self-Test Optimisation Based On Safe Faults
Submitted by grigby1 on Mon, 03/14/2022 - 11:20am
Microprocessors
test quality
test compaction
software-based self-test
software test library
Compaction
Very large scale integration
codes
built-in self-test
fault diagnosis
pubcrawl
Metrics
Policy Based Governance
Safe Coding
Libraries
Resiliency
resilience
Human Factors
Human behavior
biblio
Convolutional Compaction-Based MRAM Fault Diagnosis
Submitted by aekwall on Tue, 03/08/2022 - 1:39pm
fault diagnosis
Human Factors
pubcrawl
Metrics
Resiliency
cyber-physical systems
Resistance
Systematics
Torque
STT-MRAM
Random access memory
multiple fault diagnosis
built-in self-test
convolutional compaction
DfT
memory built-in self-test
MRAM
Ports (Computers)
biblio
BISTLock: Efficient IP Piracy Protection using BIST
Submitted by grigby1 on Wed, 08/11/2021 - 2:25pm
Logic gates
security
IP networks
pubcrawl
policy-based governance
collaboration
resilience
Resiliency
integrated circuits
composability
control systems
Measurement
ip protection
built-in self-test
biblio
Detecting untestable hardware Trojan with non-intrusive concurrent on line testing
Submitted by grigby1 on Wed, 03/08/2017 - 1:32pm
manufacturing testing
untestable hardware trojan
Trojan horses
security
Radiation detectors
pubcrawl170112
nonintrusive concurrent on line testing
Monitoring
microprocessor chips
built-in self-test
manufacturing stage
manufacturing cycle
integrated circuit testing
HT
Hardware
Europe
circuit geometrical characteristics
chip supply chain
biblio
Diagnosis of multiple faults with highly compacted test responses
Submitted by BrandonB on Wed, 05/06/2015 - 1:31pm
field return analysis
yield ramp-up
Response Compaction
process learning
probability
Multiple Faults
multiple fault probability
multiple fault diagnosis
MISR compactor
Mathematical model
logic diagnosis
linear properties
integrated circuit yield
integrated circuit testing
Accuracy
faulty signatures
fault diagnosis
Equations
embedded test
Diagnosis
defects cluster
compressed test responses
Compaction
compacted test responses
Circuit faults
built-in self-test
built-in self test
