STARSS

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Visible to the public SaTC: STARSS: Collaborative: IPTrust: A Comprehensive Framework for IP Integrity Validation

To reduce production cost while meeting time-to-market constraints, semiconductor companies usually design hardware systems with reusable hardware modules, popularly known as Intellectual Property (IP) blocks. Growing reliance on these hardware IPs, often gathered from untrusted third-party vendors, severely affects the security and trustworthiness of the final system. The hardware IPs acquired from external sources may come with deliberate malicious implants, undocumented interfaces working as hidden backdoor, or other integrity issues.

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Visible to the public SaTC: STARSS: Metric & CAD for DPA Resistance

Physical side channels pose a big threat to the security of embedded hardware. The differential power analysis (DPA) attack is a well known side channel threat which exploits the linear dependence of the power on the secret data or an intermediate value correlated to the secret data through statistical model building. This project addresses the DPA vulnerability by deploying a technology cell library consisting of private gates. The technique developed will make embedded hardware less vulnerable to side-channel attacks, thereby securing private user data and transactions.

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Visible to the public STARSS: Small: Collaborative: Specification and Verification for Secure Hardware

There is a growing need for techniques to detect security vulnerabilities in hardware and at the hardware-software interface. Such vulnerabilities arise from the use of untrusted supply chains for processors and system-on-chip components and from the scope for malicious agents to subvert a system by exploiting hardware defects arising from design errors, incomplete specifications, or maliciously inserted blocks.

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Visible to the public SaTC: STARSS: Small: Collaborative: Managing Hardware Security in Three-Dimensional Integrated Circuits

Vertically stacked three-dimensional (3D) integration of semiconductor chips is an emerging technology to ensure continued growth in transistor density and performance of integrated circuits (ICs). Despite the well-characterized advantages and limitations, the hardware security of such circuits has not received much attention. With shrinking number of trusted circuit manufacturers, trustworthiness of electronic devices is a growing concern. Vertical integration brings unexplored and unique challenges in managing hardware security.

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Visible to the public SaTC: STARSS: FAME: Fault-attack Awareness using Microprocessor Enhancements

With the tremendous growth of sensitive and security-critical processing on embedded and pervasive platforms, the threat model for secure electronics is expanding from software into hardware. A wide range of fault attacks, based on physical manipulation of the electronics operating environment, is now available to the adversary.

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Visible to the public SaTC: STARSS: Hardware Authentication through High-Capacity PUF-Based Secret Key Generation and Lattice Coding

Hardware authentication is one of the critical needs in the emerging discipline of design for assurance and design for security. It is concerned with establishing the authenticity and provenance of Integrated Circuits (ICs) reliably and inexpensively at any point in a chip's life-time. Physical unclonable functions (PUFs) have significant promise as basic primitives for authentication since they can serve as intrinsically-generated hardware roots-of-trust within specific authentication protocols.

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Visible to the public STARSS: Small: Simulation-Based Verification of EM Side-Channel Attack Resilience of Embedded Cryptographic Systems

The widely used encryption algorithms, based both on private- and public-key cryptography, provide provable security guarantees against attacks under an abstract model of computation. In reality, physical systems leak information and the adversarial access is not completely captured by the abstractions in the standard model. Attacks that exploit a physically observable signal, such as power, timing, or electromagnetic (EM) radiation, are known as side-channel attacks. They present a formidable challenge to ensuring the security of existing cryptographic applications.