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Cyber-Physical Systems Virtual Organization
Read-only archive of site from September 29, 2023.
CPS-VO
Multicore Computing
biblio
Secure Hierarchy-Aware Cache Replacement Policy (SHARP): Defending Against Cache-Based Side Channel Atacks
Submitted by grigby1 on Wed, 02/21/2018 - 1:38pm
security
resilience
pubcrawl
Scalability
Metrics
Resiliency
cache
Cache replacement
Side Channel
multicore computing security
Multicore Computing
biblio
Acceleration of RSA processes based on hybrid ARM-FPGA cluster
Submitted by grigby1 on Wed, 02/21/2018 - 1:38pm
resilience
MPI
Multicore Computing
multicore computing security
multicore desktop
multiprocessing systems
node-to-node communication
none-subtraction Montgomery algorithm
Program processors
pubcrawl
public key cryptography
microprocessor chips
Resiliency
RSA
RSA algorithm
RSA processes acceleration
Scalability
software-hardware cooperation
system-on-chip
Xilinx Zynq SoC
Zynq
FPGA fabric
Algorithm design and analysis
ARM CPU
Chinese remainder theorem
cluster
cluster infrastructure
Clustering algorithms
computer architecture
CRT
field programmable gate arrays
Acceleration
Hardware
Heterogeneous
hybrid architectures
hybrid ARM-FPGA cluster
Intel i7-3770
many-core server
message passing
message passing interface
Metrics
biblio
Multicore implementation of EME2 AES disk encryption algorithm using OpenMP
Submitted by grigby1 on Wed, 02/21/2018 - 1:38pm
multicore computing security
standards
Speed up
Software algorithms
Scalability
Resiliency
resilience
pubcrawl
Organizations
multiprocessing systems
Multicore processing
multicore implementation
AES
Multicore Computing
multicore compatible parallel implementation
Metrics
full disk encryption
encryption
Encrypt Mix Encrypt V2 Advanced Encryption Standard
EME2 AES disk encryption algorithm
EME2 AES
Cryptography
computational complexity
biblio
An IoT Endpoint System-on-Chip for Secure and Energy-Efficient Near-Sensor Analytics
Submitted by grigby1 on Wed, 02/21/2018 - 1:38pm
secure autonomous aerial surveillance
Multicore Computing
multicore computing security
near-sensor data analytics pipeline
Neural networks
parallel architectures
pubcrawl
regular computing task
remote recognition
resilience
Resiliency
Scalability
Metrics
security of data
seizure detection
sensitive data protection
sensors
size 65 nm
SoC
software programmability
system-on-chip
tightly-coupled multicore cluster
voltage 0.8 V
energy 3.16 pJ
CNN
compute-intensive data processing
computer architecture
computerised instrumentation
Cryptography
data analysis
Data Security
deep convolutional neural network
electroencephalogram
encrypted data collection
encryption
approximate computing
energy conservation
Engines
equivalent reduced instruction set computer operation
Face detection
feature extraction
Fulmine tight power envelope
Internet of Things
Internet-of-Things endpoint
IoT endpoint system-on-chip
low-power electronics
biblio
Hermes: Secure heterogeneous multicore architecture design
Submitted by grigby1 on Wed, 02/21/2018 - 1:37pm
Program processors
trust-aware routing algorithm
tenant security
system-on-chip
system-level integration
SoC design
security
secure heterogeneous multicore architecture design
secure cores
Scalability
Resiliency
resilience
pubcrawl
programmable secure router interface
programmable RISC cores
programmable distributed group key management scheme
accelerator function units
nonsecure cores
multiprocessing systems
multiple processing elements
multilevel user-defined security
Multicore processing
multicore computing security
Multicore Computing
Metrics
Hermes architecture
Hardware
general-purpose system-on-chip architectures
DSP
ASIC
application executable code
biblio
Confidentiality and Authenticity in a Platform Based on Network-on-Chip
Submitted by grigby1 on Wed, 02/21/2018 - 1:37pm
network performance
SoCIN-based systems
silicon overhead
Security Properties
security mechanisms
security aspects
security
Scalability
Resiliency
resilience
reference multicore platform
pubcrawl
Program processors
processing elements
networks-on-chip
network-on-chip
advanced encryption standard
network level
Network interfaces
multiprocessing systems
multicore computing security
Multicore Computing
Metrics
Many-core systems
low-cost interconnect architecture
encryption
Cryptography
confidentiality
computer architecture
authenticity
AES model
biblio
On the Effectiveness of Virtualization Based Memory Isolation on Multicore Platforms
Submitted by grigby1 on Wed, 02/21/2018 - 1:37pm
page table maintenance
XMHF
virtualization based memory isolation
virtualisation
Virtual machine monitors
thread identification
storage management
software maintenance
security primitive
security of data
security
Scalability
Resiliency
resilience
pubcrawl
address mapping validation
multiprocessing systems
multicore setting
Multicore processing
multicore platforms
multicore computing security
Multicore Computing
Metrics
memory isolation security
Kernel
Instruction sets
Hardware
fully isolated microcomputing environment
FIMCE
BitVisor
biblio
Optimizing Task Assignment with Minimum Cost on Heterogeneous Embedded Multicore Systems Considering Time Constraint
Submitted by grigby1 on Wed, 02/21/2018 - 1:37pm
Processor scheduling
Guaranteed Probability
Heterogeneous Embedded Multicore System
heterogeneous embedded multicore systems
heterogeneous multicore architectures
minimum cost
multiprocessing systems
optimal energy efficiency
optimizing task heterogeneous assignment with probability algorithm
OTHAP
processor and voltage assignment with probability problem
execution time
processor scheduling algorithm
PVAP problem
real-time embedded systems
system performance model
Task Assignment
task assignment optimization
task completion probability
time constraint
multicore computing security
Multicore Computing
Program processors
pubcrawl
Scalability
Algorithm design and analysis
energy consumption
real-time systems
Reliability
directed graphs
probability
Metrics
Signal processing algorithms
resilience
embedded systems
Resiliency
battery-based embedded systems
computer systems
DAG
data-dependent aperiodic tasks
directed acyclic graph
dynamic programming
dynamic programming algorithm
Energy Efficiency
biblio
High Performance and High Scalable Packet Classification Algorithm for Network Security Systems
Submitted by grigby1 on Wed, 02/21/2018 - 1:37pm
Resiliency
parallel processing
partition decision trees
partitioning
Partitioning algorithms
partitioning-based packet classification algorithms
pattern classification
pubcrawl
resilience
packet classification accelerator chips
Scalability
search table
security
software-based packet classification algorithms
T-CAM
telecommunication computing
telecommunication traffic
ternary content addressable memory
high scalable packet classification algorithm
cache-aware table structure
Classification algorithms
computer network security
Decision trees
general hardware architectures
hardware-based solutions
Heuristic algorithms
high performance packet classification algorithm
Buildings
high-performance systems
integrated inter- and intra-table search
Metrics
Multicore Computing
multicore computing security
multicore multithreaded processors
network security systems
packet classification
biblio
GPU-Accelerated Batch-ACPF Solution for N-1 Static Security Analysis
Submitted by grigby1 on Wed, 02/21/2018 - 1:37pm
pubcrawl
Multicore Computing
multicore computing security
multicore CPU parallel computing solution
Multicore processing
N-1 static security analysis
parallel processing
parallelism
power systems
program diagnostics
Metrics
QR factorization
resilience
Resiliency
Scalability
security
security of data
SSA
Static security analysis (SSA)
UMFPACK-library-based single-CPU counterpart
GPU-accelerated batch-Jacobian-matrix
ACPF problem
Algorithm design and analysis
alternating current power flow
batch-solving method
contingency analysis
contingency screening
float-pointing calculation
GPU-accelerated
GPU-accelerated batch-ACPF solution
Acceleration
GPU-accelerated batch-QR solver
graphics processing unit
graphics processing units
High performance computing
high performance computing (HPC)
Intel Xeon E5-2620
Jacobian matrices
KLU library
memory bandwidth
