Hardware Implementation of Multi-Scroll Chaos Based Architecture for Securing Biometric Templates
Title | Hardware Implementation of Multi-Scroll Chaos Based Architecture for Securing Biometric Templates |
Publication Type | Conference Paper |
Year of Publication | 2018 |
Authors | Azzaz, M. S., Tanougast, C., Maali, A., Benssalah, M. |
Conference Name | 2018 International Conference on Smart Communications in Network Technologies (SaCoNeT) |
Keywords | biometric encryption, biometric templates, biometrics (access control), biometrics-based personal authentication systems, chaos, chaos-based multiscroll encryption algorithm, chaotic communication, chaotic N × N grid multiscroll system, Computer architecture, cryptography, embedded biometric systems, Embedded systems, Euler method, field programmable gate arrays, FPGA, Hardware, hardware resources, image processing, low cost image encryption, Mathematical model, Metrics, multi-scroll, multiscroll chaos based architecture, pubcrawl, Real-time Systems, resilience, Resiliency, Scalability, security, security analysis, Xilinx, Xilinx FPGA |
Abstract | In spite of numerous advantages of biometrics-based personal authentication systems over traditional security systems based on token or knowledge, they are vulnerable to attacks that can decrease their security considerably. In this paper, we propose a new hardware solution to protect biometric templates such as fingerprint. The proposed scheme is based on chaotic N x N grid multi-scroll system and it is implemented on Xilinx FPGA. The hardware implementation is achieved by applying numerical solution methods in our study, we use EM (Euler Method). Simulation and experimental results show that the proposed scheme allows a low cost image encryption for embedded systems while still providing a good trade-off between performance and hardware resources. Indeed, security analysis performed to the our scheme, is strong against known different attacks, such as: brute force, statistical, differential, and entropy. Therefore, the proposed chaos-based multiscroll encryption algorithm is suitable for use in securing embedded biometric systems. |
URL | https://ieeexplore.ieee.org/document/8585617 |
DOI | 10.1109/SaCoNeT.2018.8585617 |
Citation Key | azzaz_hardware_2018 |
- hardware resources
- Xilinx FPGA
- Xilinx
- Security analysis
- security
- Scalability
- Resiliency
- resilience
- real-time systems
- pubcrawl
- multiscroll chaos based architecture
- multi-scroll
- Metrics
- Mathematical model
- low cost image encryption
- Image Processing
- biometric encryption
- Hardware
- FPGA
- field programmable gate arrays
- Euler method
- embedded systems
- embedded biometric systems
- Cryptography
- computer architecture
- chaotic N × N grid multiscroll system
- chaotic communication
- chaos-based multiscroll encryption algorithm
- chaos
- biometrics-based personal authentication systems
- biometrics (access control)
- biometric templates