Title | LL-ATPG: Logic-Locking Aware Test Using Valet Keys in an Untrusted Environment |
Publication Type | Conference Paper |
Year of Publication | 2021 |
Authors | Rahman, M Sazadur, Li, Henian, Guo, Rui, Rahman, Fahim, Farahmandi, Farimah, Tehranipoor, Mark |
Conference Name | 2021 IEEE International Test Conference (ITC) |
Keywords | Costs, design for testability, Human Behavior, Logic gates, logic locking, Manufacturing, Manufacturing test, pattern locks, pubcrawl, resilience, Resiliency, reverse engineering, Scalability, Semiconductor device modeling, Supply chains, system-on-chip, untrusted foundry |
Abstract | The ever-increasing cost and complexity of cutting-edge manufacturing and test processes have migrated the semiconductor industry towards a globalized business model. With many untrusted entities involved in the supply chain located across the globe, original intellectual property (IP) owners face threats such as IP theft/piracy, tampering, counterfeiting, reverse engineering, and overproduction. Logic locking has emerged as a promising solution to protect integrated circuits (ICs) against supply chain vulnerabilities. It inserts key gates to corrupt circuit functionality for incorrect key inputs. A logic-locked chip test can be performed either before or after chip activation (becoming unlocked) by loading the unlocking key into the on-chip tamperproof memory. However, both pre-activation and post-activation tests suffer from lower test coverage, higher test cost, and critical security vulnerabilities. To address the shortcomings, we propose LL-ATPG, a logic-locking aware test method that applies a set of valet (dummy) keys based on a target test coverage to perform manufacturing test in an untrusted environment. LL-ATPG achieves high test coverage and minimizes test time overhead when testing the logic-locked chip before activation without sharing the unlocking key. We perform security analysis of LL-ATPG and experimentally demonstrate that sharing the valet keys with the untrusted foundry does not create additional vulnerability for the underlying locking method. |
DOI | 10.1109/ITC50571.2021.00026 |
Citation Key | rahman_ll-atpg_2021 |