Sravya, G., Kumar, Manchalla. O.V.P., Sudarsana Reddy, Y., Jamal, K., Mannem, Kiran.
2020.
The Ideal Block Ciphers - Correlation of AES and PRESENT in Cryptography. 2020 3rd International Conference on Intelligent Sustainable Systems (ICISS). :1107—1113.
In this digital era, the usage of technology has increased rapidly and led to the deployment of more innovative technologies for storing and transferring the generated data. The most important aspect of the emerging communication technologies is to ensure the safety and security of the generated huge amount of data. Hence, cryptography is considered as a pathway that can securely transfer and save the data. Cryptography comprises of ciphers that act like an algorithm, where the data is encrypted at the source and decrypted at the destination. This paper comprises of two ciphers namely PRESENT and AES ciphers. In the real-time applications, AES is no more relevant especially for segmenting the organizations that leverage RFID, Sensors and IoT devices. In order to overcome the strategic issues faced by these organization, PRESENT ciphers work appropriately with its super lightweight block figure, which has the equivalent significance to both security and equipment arrangements. This paper compares the AES (Advance encryption standard) symmetric block cipher with PRESENT symmetric block cipher to leverage in the industries mentioned earlier, where the huge consumption of resources becomes a significant factor. For the comparison of different ciphers, the results of area, timing analysis and the waveforms are taken into consideration.
Tsavos, Marios, Sklavos, Nicolas, Alexiou, George Ph..
2020.
Lightweight Security Data Streaming, Based on Reconfigurable Logic, for FPGA Platform. 2020 23rd Euromicro Conference on Digital System Design (DSD). :277—280.
Alongside the rapid expansion of Internet of Things (IoT), and network evolution (5G, 6G technologies), comes the need for security of higher level and less hardware demanding modules. New cryptographic systems are developed, in order to satisfy the special needs of security, that have emerged in modern applications. In this paper, a novel lightweight data streaming system, is proposed, which operates in alternative modes. Each one of them, performs efficiently as one of three in total, stream ciphering modules. The operation of the proposed system, is based on reconfigurable logic. It aims at a lower hardware utilization and good performance, at the same time. In addition, in order to have a fair and detailed comparison, a second one design is also integrated and introduced. This one proposes a conventional architecture, consisting of the same three stream ciphering modes, implemented on the same device, as separate operation modules. The FPGA synthesis results prove that the proposed reconfigurable design achieves to minimize the area resources, from 18% to 30%, compared to the conventional one, while maintaining high performance values, for the supported modes.
Aiswarya Meenakshi, P., Veera Santhya, R., Sherine Jenny, R., Sudhakar, R..
2020.
Implementation and Cryptanalysis of Lightweight Block Ciphers. 2020 4th International Conference on Trends in Electronics and Informatics (ICOEI)(48184). :253—258.
Encryption has become an important need for each and every data transmission. Large amount of delicate data is transferred regularly through different computer networks such as e-banking, email applications and file exchange. Cryptanalysis is study of analyzing the hidden information in the system. The process of cryptanalysis could be done by various features such as power, sound, electromagnetic radiation etc. Lightweight cryptography plays an important role in the IoT devices. It includes various appliances, vehicles, smart sensors and RFID-tags (RFID). PRESENT is one such algorithm, designed for resource constrained devices. This requires less memory and consumes less power. The project propounds a model in which the cryptographic keys are analyzed by the trace of power.
Pandey, Jai Gopal, Laddha, Ayush, Samaddar, Sashwat Deb.
2020.
A Lightweight VLSI Architecture for RECTANGLE Cipher and its Implementation on an FPGA. 2020 24th International Symposium on VLSI Design and Test (VDAT). :1—6.
Block ciphers are one of the most fundamental building blocks for information and network security. In recent years, the need for lightweight ciphers has dramatically been increased due to their wide use in low-cost cryptosystems, wireless networks and resource-constrained embedded devices including RFIDs, sensor nodes, smart cards etc. In this paper, an efficient lightweight architecture for RECTANGLE block cipher has been proposed. The architecture is suitable for extremely hardware-constrained environments and multiple platforms due to its support of bit-slice technique. The proposed architecture has been synthesized and implemented on Xilinx Virtex-5 xc5vlx110t-1ff1136 field programmable gate array (FPGA) device. Implementation results have been presented and compared with the existing architectures and have shown commensurable performance. Also, an application-specific integrated circuit (ASIC) implementation of the architecture is done on SCL 180 nm CMOS technology where it consumes 2362 gate equivalent (GE).
Oda, Maya, Ueno, Rei, Inoue, Akiko, Minematsu, Kazuhiko, Homma, Naofumi.
2020.
PMAC++: Incremental MAC Scheme Adaptable to Lightweight Block Ciphers. 2020 IEEE International Symposium on Circuits and Systems (ISCAS). :1—4.
This paper presents a new incremental parallelizable message authentication code (MAC) scheme adaptable to lightweight block ciphers for memory integrity verification. The highlight of the proposed scheme is to achieve both incremental update capability and sufficient security bound with lightweight block ciphers, which is a novel feature. We extend the conventional parallelizable MAC to realize the incremental update capability while keeping the original security bound. We prove that a comparable security bound can be obtained even if this change is incorporated. We also present a hardware architecture for the proposed MAC scheme with lightweight block ciphers and demonstrate the effectiveness through FPGA implementation. The evaluation results indicate that the proposed MAC hardware achieves 3.4 times improvement in the latency-area product for the tag update compared with the conventional MAC.