A data remanence based approach to generate 100% stable keys from an SRAM physical unclonable function
Title | A data remanence based approach to generate 100% stable keys from an SRAM physical unclonable function |
Publication Type | Conference Paper |
Year of Publication | 2017 |
Authors | Liu, M., Zhou, C., Tang, Q., Parhi, K. K., Kim, C. H. |
Conference Name | 2017 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED) |
ISBN Number | 978-1-5090-6023-8 |
Keywords | Arrays, bit masking, Circuit stability, compositionality, cryptography, data remanence, data remanence based approach, device aging, encryption keys, Hardware, inherent process mismatch, memory size 512 KByte, physical unclonable function, power ramp up times, pubcrawl, random noise, reliable key generation, remanence, resilience, Resiliency, SRAM, SRAM based key generation, SRAM cell, SRAM cells, SRAM chips, stable key generation, stable keys, temporal majority voting, Thermal stability, TMV scheme, word length 256 bit |
Abstract | The start-up value of an SRAM cell is unique, random, and unclonable as it is determined by the inherent process mismatch between transistors. These properties make SRAM an attractive circuit for generating encryption keys. The primary challenge for SRAM based key generation, however, is the poor stability when the circuit is subject to random noise, temperature and voltage changes, and device aging. Temporal majority voting (TMV) and bit masking were used in previous works to identify and store the location of unstable or marginally stable SRAM cells. However, TMV requires a long test time and significant hardware resources. In addition, the number of repetitive power-ups required to find the most stable cells is prohibitively high. To overcome the shortcomings of TMV, we propose a novel data remanence based technique to detect SRAM cells with the highest stability for reliable key generation. This approach requires only two remanence tests: writing `1' (or `0') to the entire array and momentarily shutting down the power until a few cells flip. We exploit the fact that the cells that are easily flipped are the most robust cells when written with the opposite data. The proposed method is more effective in finding the most stable cells in a large SRAM array than a TMV scheme with 1,000 power-up tests. Experimental studies show that the 256-bit key generated from a 512 kbit SRAM using the proposed data remanence method is 100% stable under different temperatures, power ramp up times, and device aging. |
URL | https://ieeexplore.ieee.org/document/8009192/ |
DOI | 10.1109/ISLPED.2017.8009192 |
Citation Key | liu_data_2017 |
- random noise
- word length 256 bit
- TMV scheme
- Thermal stability
- temporal majority voting
- stable keys
- stable key generation
- SRAM chips
- SRAM cells
- SRAM cell
- SRAM based key generation
- SRAM
- Resiliency
- resilience
- remanence
- reliable key generation
- arrays
- pubcrawl
- power ramp up times
- Physical Unclonable Function
- memory size 512 KByte
- inherent process mismatch
- Hardware
- encryption keys
- device aging
- data remanence based approach
- data remanence
- Cryptography
- Compositionality
- Circuit stability
- bit masking