An Efficient SAT-Attack Algorithm Against Logic Encryption
| Title | An Efficient SAT-Attack Algorithm Against Logic Encryption |
| Publication Type | Conference Paper |
| Year of Publication | 2019 |
| Authors | Matsunaga, Yusuke, Yoshimura, Masayoshi |
| Conference Name | 2019 IEEE 25th International Symposium on On-Line Testing and Robust System Design (IOLTS) |
| ISBN Number | 978-1-7281-2490-2 |
| Keywords | Benchmark testing, composability, computability, cryptography, Cyber physical system, cyber physical systems, decryption, efficient encryption, encrypted circuits, Encryption, information science, integrated circuits, logic encryption, Logic gates, logic IP protection, pubcrawl, resilience, Resiliency, SAT, SAT-attack algorithm, Superluminescent diodes |
| Abstract | This paper presents a novel efficient SAT-attack algorithm for logic encryption. The existing SAT-attack algorithm can decrypt almost all encrypted circuits proposed so far, however, there are cases that it takes a huge amount of CPU time. This is because the number of clauses being added during the decryption increases drastically in that case. To overcome that problem, a novel algorithm is developed, which considers the equivalence of clauses to be added. Experiments show that the proposed algorithm is much faster than the existing algorithm. |
| URL | https://ieeexplore.ieee.org/document/8854466 |
| DOI | 10.1109/IOLTS.2019.8854466 |
| Citation Key | matsunaga_efficient_2019 |
- information science
- Superluminescent diodes
- SAT-attack algorithm
- SAT
- Resiliency
- resilience
- pubcrawl
- logic IP protection
- Logic gates
- logic encryption
- integrated circuits
- Benchmark testing
- encryption
- encrypted circuits
- efficient encryption
- decryption
- cyber physical systems
- Cyber Physical System
- Cryptography
- computability
- composability