| Title | Mesh Based Obfuscation of Analog Circuit Properties |
| Publication Type | Conference Paper |
| Year of Publication | 2019 |
| Authors | Rao, V. V., Savidis, I. |
| Conference Name | 2019 IEEE International Symposium on Circuits and Systems (ISCAS) |
| Keywords | 2×6 mesh structure, analog circuit properties, Analog circuits, analog obfuscation, analog satisfiability algorithm, aSAT algorithm, auto-determine, Brute Force Attack, circuit design, circuit functionality, composability, computability, cryptography, Design methodology, effective transistor dimensions, encryption key, enhanced security, IP piracy, key based obfuscation technique, LC tank voltage-controlled oscillator, mesh topology, obfuscated circuitry, obfuscated transistors, obfuscation methodology, operating frequency, physical dimensions, policy-based governance, probability, pubcrawl, Resiliency, reverse engineering, SAT, satisfiability modulo theory based algorithm, SMT, target frequency, Threshold voltage, Topology, transistor circuits, transistor sizes, Transistors, varactor transistor, Varactors, VCO, voltage amplitude, voltage-controlled oscillators |
| Abstract | In this paper, a technique to design analog circuits with enhanced security is described. The proposed key based obfuscation technique uses a mesh topology to obfuscate the physical dimensions and the threshold voltage of the transistor. To mitigate the additional overhead of implementing the obfuscated circuitry, a satisfiability modulo theory (SMT) based algorithm is proposed to auto-determine the sizes of the transistors selected for obfuscation such that only a limited set of key values produce the correct circuit functionality. The proposed algorithm and the obfuscation methodology is implemented on an LC tank voltage-controlled oscillator (VCO). The operating frequency of the VCO is masked with a 24-bit encryption key applied to a 2x6 mesh structure that obfuscates the dimensions of each varactor transistor. The probability of determining the correct key is 5.96x10-8 through brute force attack. The dimensions of the obfuscated transistors determined by the analog satisfiability (aSAT) algorithm result in at least a 15%, 3%, and 13% deviation in, respectively, the effective transistor dimensions, target frequency, and voltage amplitude when an incorrect key is applied to the VCO. In addition, only one key produces the desired frequency and properly sets the overall performance specifications of the VCO. The simulated results indicate that the proposed design methodology, which quickly and accurately determines the transistor sizes for obfuscation, produces the target specifications and provides protection for analog circuits against IP piracy and reverse engineering. |
| DOI | 10.1109/ISCAS.2019.8702671 |
| Citation Key | rao_mesh_2019 |
Mesh Based Obfuscation of Analog Circuit Properties