Skip to Main Content Area
CPS-VO
Contact Support
Browse
Calendar
Announcements
Repositories
Groups
Search
Search for Content
Search for a Group
Search for People
Search for a Project
Tagcloud
› Go to login screen
Not a member?
Click here to register!
Forgot username or password?
Cyber-Physical Systems Virtual Organization
Read-only archive of site from September 29, 2023.
CPS-VO
Multicore processing
biblio
Design and Analysis of SIC: A Provably Timing-Predictable Pipelined Processor Core
Submitted by grigby1 on Mon, 10/05/2020 - 2:00pm
SIC
worst-case execution time
WCET analysis
WCET
timing-predictable pipelined processor core
timing predictability
timing compositionality
timing anomalies
timing
Task Analysis
strictly in-order core
standard in-order pipeline design
Silicon carbide
Compositionality
real-time systems
pubcrawl
pipelining
Pipelines
pipeline processing
multiprocessing systems
multicore timing analysis
Multicore processing
multi-core
monotonicity
microprocessor chips
Hardware
biblio
SATIN: A Secure and Trustworthy Asynchronous Introspection on Multi-Core ARM Processors
Submitted by aekwall on Mon, 02/10/2020 - 11:57am
security of data
pubcrawl
Resiliency
SATIN
Scalability
secure introspection mechanism
secure world checking solutions
secure world introspection
security
operating systems (computers)
security policy violations
security protection
Trusted Computing
Trusted Execution Environment
trustworthy asynchronous introspection mechanism
Trustworthy Systems
TrustZone security extension
Mobile handsets
Asynchronous Introspection
composability
cyber physical systems
Evasion Attack
Instruction sets
Kernel
Metrics
microprocessor chips
ARM development board
multicore ARM processors
multicore ARM system
multicore computing security
Multicore processing
multiprocessing systems
normal world snapshot
normal-world evasion attack
biblio
Light Database Encryption Design Utilizing Multicore Processors for Mobile Devices
Submitted by aekwall on Mon, 11/04/2019 - 11:23am
Resiliency
multiprocessing systems
parallel database encryption system
parallel databases
Performance
performance evaluation
pubcrawl
RDBMS
relational database security
relational databases
Multicore processing
Scalability
smart phones
SQLite databases
SQLite RDBMS
SQLite-XTS
storage management
storage security
user sensitive data
XTS encryption
full disk encryption
composability
Cryptography
data confidentiality
Data protection
Databases
device processing resources
embedded devices
embedded systems
encryption
commodity multicore processors
handheld devices
Human behavior
light database encryption design
massive storage systems
Metrics
mobile computing
mobile devices
multicore CPU
multicore computing security
biblio
Functionality and Security Co-Design Environment for Embedded Systems
Submitted by grigby1 on Thu, 02/14/2019 - 11:23am
recovery
Hardware
hardware development
intelligence surveillance and reconnaissance sensors
Lincoln asymmetric multicore processing architecture
Mission Assurance
mission functions
Multicore processing
multiprocessing systems
pubcrawl
functionality
resilience
resilient embedded system
Secure Processing
security
software development
Sophisticated Attacks
surveillance
System recovery
testbed
computer network security
Resiliency
adversarial cyber effects
anomalies detection
asymmetric multicore processing
Availability
co-design
co-design environment
command and control systems
Complexity theory
Resilient Security Architectures
critical missions
Cryptography
deliberate attacks
department of defense mission systems
DoD
electronic signal intelligence systems
electronic warfare
embedded systems
biblio
Multicore implementation of EME2 AES disk encryption algorithm using OpenMP
Submitted by grigby1 on Wed, 02/21/2018 - 1:38pm
multicore computing security
standards
Speed up
Software algorithms
Scalability
Resiliency
resilience
pubcrawl
Organizations
multiprocessing systems
Multicore processing
multicore implementation
AES
Multicore Computing
multicore compatible parallel implementation
Metrics
full disk encryption
encryption
Encrypt Mix Encrypt V2 Advanced Encryption Standard
EME2 AES disk encryption algorithm
EME2 AES
Cryptography
computational complexity
biblio
Hermes: Secure heterogeneous multicore architecture design
Submitted by grigby1 on Wed, 02/21/2018 - 1:37pm
Program processors
trust-aware routing algorithm
tenant security
system-on-chip
system-level integration
SoC design
security
secure heterogeneous multicore architecture design
secure cores
Scalability
Resiliency
resilience
pubcrawl
programmable secure router interface
programmable RISC cores
programmable distributed group key management scheme
accelerator function units
nonsecure cores
multiprocessing systems
multiple processing elements
multilevel user-defined security
Multicore processing
multicore computing security
Multicore Computing
Metrics
Hermes architecture
Hardware
general-purpose system-on-chip architectures
DSP
ASIC
application executable code
biblio
On the Effectiveness of Virtualization Based Memory Isolation on Multicore Platforms
Submitted by grigby1 on Wed, 02/21/2018 - 1:37pm
page table maintenance
XMHF
virtualization based memory isolation
virtualisation
Virtual machine monitors
thread identification
storage management
software maintenance
security primitive
security of data
security
Scalability
Resiliency
resilience
pubcrawl
address mapping validation
multiprocessing systems
multicore setting
Multicore processing
multicore platforms
multicore computing security
Multicore Computing
Metrics
memory isolation security
Kernel
Instruction sets
Hardware
fully isolated microcomputing environment
FIMCE
BitVisor
biblio
GPU-Accelerated Batch-ACPF Solution for N-1 Static Security Analysis
Submitted by grigby1 on Wed, 02/21/2018 - 1:37pm
pubcrawl
Multicore Computing
multicore computing security
multicore CPU parallel computing solution
Multicore processing
N-1 static security analysis
parallel processing
parallelism
power systems
program diagnostics
Metrics
QR factorization
resilience
Resiliency
Scalability
security
security of data
SSA
Static security analysis (SSA)
UMFPACK-library-based single-CPU counterpart
GPU-accelerated batch-Jacobian-matrix
ACPF problem
Algorithm design and analysis
alternating current power flow
batch-solving method
contingency analysis
contingency screening
float-pointing calculation
GPU-accelerated
GPU-accelerated batch-ACPF solution
Acceleration
GPU-accelerated batch-QR solver
graphics processing unit
graphics processing units
High performance computing
high performance computing (HPC)
Intel Xeon E5-2620
Jacobian matrices
KLU library
memory bandwidth
biblio
Fractal++: Closing the performance gap between fractal and conventional coherence
Submitted by BrandonB on Wed, 05/06/2015 - 2:43pm
performance scalability
multicores
observational equivalence
optimization
parallel invalidations
parallel processing
partially-serial-invalidations
performance gap
performance optimizations
Multicore processing
protocol optimizations
Protocols
reply-forwarding
Scalability
single-socket system
state explosion
verification scalability
verification-constrained architectures
formal verification
cache coherence protocol bugs
cache storage
Coherence
coherence verification approaches
contention-hints
decoupled-replies
directory protocols
Erbium
32-core simulations
four-socket system
fractal coherence
fractal protocols
Fractal++
Fractals
fully-parallel-fractal-invalidations
indirect-communication
longer-latency multisocket system
biblio
Main-Memory Hash Joins on Modern Processor Architectures
Submitted by BrandonB on Wed, 05/06/2015 - 11:55am
Hardware
Instruction sets
Latches
Multicore processing
Probes
tuning
« first
‹ previous
1
2
3
4
next ›
last »
