Implementation and optimization of A5-1 algorithm on coarse-grained reconfigurable cryptographic logic array

Title	Implementation and optimization of A5-1 algorithm on coarse-grained reconfigurable cryptographic logic array
Publication Type	Conference Paper
Year of Publication	2017
Authors	Liu, M., Yan, Y. J., Li, W.
Conference Name	2017 IEEE 12th International Conference on ASIC (ASICON)
Date Published	oct
Keywords	A5-1, A5-1 algorithm optimization, Algorithm design and analysis, application specific integrated circuits, ASIC, bit rate 162.87 Mbit/s, cellular radio, CGRCA, Ciphers, coarse-grained reconfigurable cryptographic logic array, composability, Conferences, cryptography, field programmable gate arrays, FPGA, frequency 162.87 MHz, GSM, Metrics, Microelectronic Security, Noise measurement, Performance optimization, pubcrawl, real-time requirements, reconfigurable architectures, resilience, Resiliency, resource allocation, resource consumption, resource-based path seeking algorithm, RPS adaptive algorithm, shift registers, stream cipher, telecommunication security, Throughput, voice data encryption
Abstract	A5-1 algorithm is a stream cipher used to encrypt voice data in GSM, which needs to be realized with high performance due to real-time requirements. Traditional implementation on FPGA or ASIC can't obtain a trade-off among performance, cost and flexibility. To this aim, this paper introduces CGRCA to implement A5-1, and in order to optimize the performance and resource consumption, this paper proposes a resource-based path seeking (RPS) algorithm to develop an advanced implementation. Experimental results show that final optimal throughput of A5-1 implemented on CGRCA is 162.87Mbps when the frequency is 162.87MHz, and the set-up time is merely 87 cycles, which is optimal among similar works.
URL	http://ieeexplore.ieee.org/document/8252467/
DOI	10.1109/ASICON.2017.8252467
Citation Key	liu_implementation_2017