Resilient Reorder Buffer Design for Network-on-Chip
| Title | Resilient Reorder Buffer Design for Network-on-Chip |
| Publication Type | Conference Paper |
| Year of Publication | 2019 |
| Authors | Xu, Zheng, Abraham, Jacob |
| Conference Name | 20th International Symposium on Quality Electronic Design (ISQED) |
| Keywords | area efficient safe design techniques, buffer circuits, Collaboration, control logic function, Diagnostic Coverage requirement, error correction codes, error detection, error detection code, error detection codes, Fault tolerance, Fault tolerant systems, high performance computing systems, Human Behavior, human factors, Industries, integrated circuit design, invariance checking, logic design, Metrics, Network interfaces, network-on-chip, Network-on-Chip Advanced eXtensible Interface Network Interface block, parallel processing, policy-based governance, pubcrawl, random control logic, Registers, Reorder Buffer, resilience, Resiliency, resilient Reorder buffer design, Safe Coding, safe control logic design, safe ROB design, Safety, Table lookup |
| Abstract | Functionally safe control logic design without full duplication is difficult due to the complexity of random control logic. The Reorder buffer (ROB) is a control logic function commonly used in high performance computing systems. In this study, we focus on a safe ROB design used in an industry quality Network-on-Chip (NoC) Advanced eXtensible Interface (AXI) Network Interface (NI) block. We developed and applied area efficient safe design techniques including partial duplication, Error Detection Code (EDC) and invariance checking with formal proofs and showed that we can achieve a desired safe Diagnostic Coverage (DC) requirement with small area and power overheads and no performance degradation. |
| DOI | 10.1109/ISQED.2019.8697766 |
| Citation Key | xu_resilient_2019 |
- Reorder Buffer
- Network interfaces
- network-on-chip
- Network-on-Chip Advanced eXtensible Interface Network Interface block
- parallel processing
- policy-based governance
- pubcrawl
- random control logic
- Registers
- Metrics
- resilience
- Resiliency
- resilient Reorder buffer design
- Safe Coding
- safe control logic design
- safe ROB design
- Safety
- Table lookup
- fault tolerance
- buffer circuits
- collaboration
- control logic function
- Diagnostic Coverage requirement
- error correction codes
- error detection
- error detection code
- error detection codes
- area efficient safe design techniques
- Fault tolerant systems
- high performance computing systems
- Human behavior
- Human Factors
- Industries
- integrated circuit design
- invariance checking
- logic design