Visible to the public Secure Network-on-Chip Architectures for MPSoC: Overview and Challenges

TitleSecure Network-on-Chip Architectures for MPSoC: Overview and Challenges
Publication TypeConference Paper
Year of Publication2018
AuthorsDaoud, Luka
Conference Name2018 IEEE 61st International Midwest Symposium on Circuits and Systems (MWSCAS)
KeywordsComputer architecture, data communication, Hardware, hardware trojan, HT, Malicious-Tolerant Routing Algorithms, Metrics, MPSoC, multiprocessing systems, multiprocessor-based systems on chip, network on chip security, network-on-chip, NoC, NoC-based systems, processing cores, pubcrawl, resilience, Resiliency, Routing, Scalability, secure network-on-chip architectures, secure routing algorithm, secure routing algorithms, security, security threat attacks, Trojan horses
AbstractNetwork-on-Chip (NOC) is the heart of data communication between processing cores in Multiprocessor-based Systems on Chip (MPSoC). Packets transferred via the NoC are exposed to snooping, which makes NoC-based systems vulnerable to security attacks. Additionally, Hardware Trojans (HTs) can be deployed in some of the NoC nodes to apply security threats of extracting sensitive information or degrading the system performance. In this paper, an overview of some security attacks in NoC-based systems and the countermeasure techniques giving prominence on malicious nodes are discussed. Work in progress for secure routing algorithms is also presented.
DOI10.1109/MWSCAS.2018.8623831
Citation Keydaoud_secure_2018