Hardware

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Visible to the public STARSS: Small: Collaborative: Physical Design for Secure Split Manufacturing of ICs

The trend of outsourcing semiconductor manufacturing to oversea foundries has introduced several security vulnerabilities -- reverse engineering, malicious circuit insertion, counterfeiting, and intellectual property piracy -- making the semiconductor industry lose billions of dollars. Split manufacturing of integrated circuits reduces vulnerabilities introduced by an untrusted foundry by manufacturing only some of the layers at an untrusted high-end foundry and the remaining layers at a trusted low-end foundry.

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Visible to the public STARSS: Small: Collaborative: Practical and Scalable Security Verification of Security-Aware Hardware Architectures

Computers form the backbone of any modern society, and often process large amounts of sensitive and private information. To help secure the software, and the sensitive data, a number of secure hardware-software and processor architectures have been proposed. These architectures incorporate novel protection and defense mechanisms directly in the hardware where they cannot be modified or bypassed, unlike software protections.

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Visible to the public TWC: TTP Option: Large: Collaborative: Internet-Wide Vulnerability Measurement, Assessment, and Notification

This project aims to reduce the impact of software vulnerabilities in Internet-connected systems by developing data-driven techniques for vulnerability measurement, assessment, and notification. Recent advances in Internet-wide scanning make it possible to conduct network surveys of the full public IPv4 address space in minutes.

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Visible to the public EAGER: Securing Integrated Circuits Through Realtime Hardware Trojan Detection

Modifications to integrated circuits (ICs) or the insertion of foreign intellectual property pose a serious threat to U.S. sovereignty, as ICs are found in many consumer electronic devices, including phones, computers, and televisions. More importantly, many commercial and military U.S. assets rely on ICs for computation and management of critical infrastructure such as banking, energy, and defense systems. The primary impact of the proposed work is to improve the security of U.S.

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Visible to the public SaTC: STARSS: ICM: Invariant Carrying Machine for Hardware Assurance

Design of complex semiconductor circuits and systems requires many steps, involves hundreds of engineers, and is typically distributed across multiple locations and organizations worldwide. The conventional processes and tools for design of semiconductors can ensure the correctness, that is, the resulting product does what it is supposed to do. However, these processes do not provide confidence about whether the chip is altered such that it provides unauthorized access or control.

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Visible to the public TWC: TTP Option: Medium: Collaborative: Identifying and Mitigating Trust Violations in the Smartphone Ecosystem

The adoption of smartphones has steadily increased in the past few years, and smartphones have become the tool with which millions of users handle confidential information, such as financial and health-related data. As a result, these devices have become attractive targets for cybercriminals, who attempt to violate the trust assumptions underlying the smartphone platform in order to compromise the security and privacy of users.

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Visible to the public  STARSS: Small: GC@Scale: Synthesis, optimization, and implementation of Garbled Circuits for Scalable Privacy-Preserving Computing

Computing on sensitive data is a standing challenge central to several modern-world applications. Secure Function Evaluation (SFE) allows mistrusting parties to jointly compute an arbitrary function on their private inputs without revealing anything but the result. The GC@Scale project focuses on novel scalable methods for addressing SFE, which directly translate to stronger cryptography and security for myriads of tasks with sensitive data.

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Visible to the public EDU: Collaborative: HACE Lab: An Online Hardware Security Attack and Countermeasure Evaluation Lab

This project addresses the need to train students, researchers, and practitioners on diverse hardware security and trust issues as well as emergent solutions. The primary goal is establishing a set of hardware security courseware and enabling adoption of these courseware through the development of an online Hardware Attack and Countermeasure Evaluation (HACE) Lab.

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Visible to the public TWC: Medium: Collaborative: Active Security

Computer and network security is currently challenged by the need to secure diverse network environments including clouds and data-centers, PCs and enterprise infrastructures. This diversity of environments is coupled to increased attack sophistication. Today's tools for securing network and computing infrastructures can be painstakingly composed and configured using available components, but fail to automatically learn from their environment and actively protect it.

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Visible to the public TWC: Small: MIST: Systematic Analysis of Microarchitectural Information Leakage on Mobile Platforms

Smart phones have permeated all facets of our lives facilitating daily activities from shopping to social interactions. Mobile devices collect sensitive information about our behavior via various sensors. Operating systems (OS)enforce strict isolation between apps to protect data and complex permission management. Yet, apps get free access to hardware including CPU and caches. Access to shared hardware resources result in information leakage across apps. Microarchitectural attacks have already proven to succeed in stealing information on PC and even on virtualized cloud servers.