Hardware

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Visible to the public TWC: Small: New Directions in Field Programmable Gate Arrays (FPGA) Security

Field-programmable gate arrays (FPGAs) represent an important computing infrastructure which must be protected from attackers. They are used in a wide variety of applications, including networking routers, satellites, military equipment, and automobiles, among others. The storage of FPGA programming information in memory external to the device creates a natural security weakness which, to date, has primarily been addressed via bitstream encryption.

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Visible to the public TWC SBE: Small: Collaborative: Brain Password: Exploring A Psychophysiological Approach for Secure User Authentication

Cryptographic systems often rely on the secrecy of cryptographic credentials; however, these are vulnerable to eavesdropping and can resist neither a user's intentional disclosure nor coercion attacks where the user is forced to reveal the credentials. Conventional biometric keys (e.g., fingerprint, iris, etc.), unfortunately, can still be surreptitiously duplicated or adversely revealed. In this research, the PIs argue that the most secure cryptographic credentials are ones of which the users aren't even aware.

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Visible to the public TWC: Small: Collaborative: Toward Trusted Third-Party Microprocessor Cores: A Proof Carrying Code Approach

Third-party hardware Intellectual Property (IP), written as code in a Hardware Description Language (HDL), is extensively used in modern integrated circuits. Contemporary electronics typically include 75% of third party hardware IP and only 25% in-house design to provide customization or a profit-making edge. Such extensive use of third-party hardware IP in both commercial and military applications raises security and trustworthiness concerns, especially in today's globalized market.

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Visible to the public TWC: Medium: HARDWARE-ASSISTED LIGHTWEIGHT CAPABILITY OPTIMIZATION (HALCYON)

To address today's environment of constant security challenges and cyber-threats, the Hardware-Assisted Lightweight Capability Optimization (HALCYON) research explores novel techniques to make the performance of more secure system designs acceptable to users. Conventional system designs have achieved acceptable performance, but have evolved from hardware and software designs that carry forward compromises in security that made sense in the past, but not with modern hardware resources in today's security climate.

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Visible to the public EDU: A Virtual Lab for a Hardware Security Curriculum

The objective of this project is to create a virtual laboratory for hardware security lab exercises. The lab exercises are based on a hands-on 'hardware hacking' course where students can work on specialized hardware to try out various hardware-based attacks. These lab activities include modules on side channel power analysis attacks, electromagnetic keyboard logging, counterfeit integrated circuit detection, and hardware Trojan attacks.

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Visible to the public TWC: Small: Collaborative: Toward Trusted Third-Party Microprocessor Cores: A Proof Carrying Code Approach

Third-party hardware Intellectual Property (IP), written as code in a Hardware Description Language (HDL), is extensively used in modern integrated circuits. Contemporary electronics typically include 75% of third party hardware IP and only 25% in-house design to provide customization or a profit-making edge. Such extensive use of third-party hardware IP in both commercial and military applications raises security and trustworthiness concerns, especially in today's globalized market.

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Visible to the public EDU: Collaborative: When Cyber Security Meets Physical World: A Multimedia-based Virtual Classroom for Cyber-Physical Systems Security Education to Serve City / Rural Colleges

This project establishes a multimedia-based virtual classroom with a virtual lab teaching assistant for the education of cyber physical system (CPS) security. Such a virtual classroom helps college students in resource-limited rural areas to learn the latest CPS security knowledge via an on-line peer-to-peer learning environment with other students from larger schools.

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Visible to the public  TWC: Small: Ascend: Architecture for Secure Computation on Encrypted Data

Outsourcing computation to the cloud has a difficult set of privacy challenges, a primary one being that the client cannot really trust cloud or application software. Encrypted computation achieves privacy by having the user specify encrypted inputs to a program in the cloud and returning encrypted results.

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Visible to the public TWC: Medium: Collaborative: DIORE: Digital Insertion and Observation Resistant Execution

Cloud computing allows users to delegate data and computation to cloud providers, at the cost of giving up physical control of their computing infrastructure. An attacker with physical access to the computing platform can perform various physical attacks, referred to as digital insertion and observation attacks, which include probing memory buses, tampering with memory, and cold-boot style attacks. While memory encryption can prevent direct leakage of data under digital observation, memory access patterns to even encrypted data may leak sensitive information.

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Visible to the public TWC: Small: Physically Unclonable Function (PUF) Enhancements Via Lithography and Design Partnership

Silicon physically unclonable function (PUF) is a supplemental circuit embedded in an IC which generates signatures unique to its native IC. This signature could be used for authentication, protection of data and secure communication. PUFs rely on the presence of uncontrollable variations in the fabrication process causing the circuit parameters to exhibit randomness. Current approaches for PUF design have mostly investigated circuit and architectural aspects. PUF quality is severely marred by a lack of understanding of exactly how fabrication process variations impact the PUF responses.