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National Science Foundation

Cyber-Physical Systems Virtual Organization

Read-only archive of site from September 29, 2023.

CPS-VO

robust design-for-security architecture

biblio

Visible to the public Is Robust Design-for-Security Robust Enough? Attack on Locked Circuits with Restricted Scan Chain Access

Submitted by aekwall on Tue, 09/08/2020 - 9:59am
  • locked circuits
  • Chained Attacks
  • working chip
  • unauthorized scan access
  • secret key recovery
  • scan chain
  • SAT attack
  • robust DFS technique
  • robust DFS design
  • robust design-for-security architecture
  • restricted scan chain access
  • logic locking security
  • logic locking attacks
  • Scalability
  • IP piracy
  • Boolean satisfiability based attack
  • benchmark circuits
  • ATPG
  • Boolean functions
  • logic circuits
  • computability
  • Security analysis
  • logic locking
  • pubcrawl
  • Resiliency
  • Cryptography

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