| Title | IC/IP Piracy Assessment of Reversible Logic |
| Publication Type | Conference Paper |
| Year of Publication | 2018 |
| Authors | Saeed, S. M., Cui, X., Zulehner, A., Wille, R., Drechsler, R., Wu, K., Karri, R. |
| Conference Name | 2018 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) |
| Keywords | adders, adiabatic computing, ancillary inputs, BDD, binary decision diagrams, composability, embedded function, Embedded systems, garbage outputs, IC-IP piracy assessment, IC/IP piracy, industrial property, Integrated circuit modeling, intellectual property piracy, IP networks, IP piracy, logic circuits, logic design, Logic gates, Number of embeddings, policy-based governance, proper-size reversible functions, pubcrawl, QMDD, quantum computing, quantum multivalued decision diagrams, regular functions, Resiliency, Reversible logic, reversible logic circuits, reversible logic synthesis tools, security, Trojan horses |
| Abstract | Reversible logic is a building block for adiabatic and quantum computing in addition to other applications. Since common functions are non-reversible, one needs to embed them into proper-size reversible functions by adding ancillary inputs and garbage outputs. We explore the Intellectual Property (IP) piracy of reversible circuits. The number of embeddings of regular functions in a reversible function and the percent of leaked ancillary inputs measure the difficulty of recovering the embedded function. To illustrate the key concepts, we study reversible logic circuits designed using reversible logic synthesis tools based on Binary Decision Diagrams and Quantum Multi-valued Decision Diagrams. |
| DOI | 10.1145/3240765.3240817 |
| Citation Key | saeed_icip_2018 |
IC/IP Piracy Assessment of Reversible Logic