Title | Mystic: Mystifying IP Cores Using an Always-ON FSM Obfuscation Method |
Publication Type | Conference Paper |
Year of Publication | 2018 |
Authors | Patooghy, A., Aerabi, E., Rezaei, H., Mark, M., Fazeli, M., Kinsy, M. A. |
Conference Name | 2018 IEEE Computer Society Annual Symposium on VLSI (ISVLSI) |
Date Published | jul |
Keywords | application specific integrated circuits, ASIC technology, circuit complexity, combinational circuits, Complexity theory, composability, encoding, finite state machine, finite state machines, FSM obfuscation method, Hardware, hardware obfuscation method, hardware security, integrated circuit industry, IP networks, IP overproduction, IP piracy, ITC99 circuit benchmarks, logic circuits, logic design, logic encryption, Logic gates, Logic masking, microprocessor chips, Mystic obfuscation approach, Mystic protection method, mystifying IP cores, obfuscation, policy-based governance, Production, pubcrawl, Resiliency, reverse engineering, size 45.0 nm |
Abstract | The separation of manufacturing and design processes in the integrated circuit industry to tackle the ever increasing circuit complexity and time to market issues has brought with it some major security challenges. Chief among them is IP piracy by untrusted parties. Hardware obfuscation which locks the functionality and modifies the structure of an IP core to protect it from malicious modifications or piracy has been proposed as a solution. In this paper, we develop an efficient hardware obfuscation method, called Mystic (Mystifying IP Cores), to protect IP cores from reverse engineering, IP overproduction, and IP piracy. The key idea behind Mystic is to add additional state transitions to the original/functional FSM (Finite State Machine) that are taken only when incorrect keys are applied to the circuit. Using the proposed Mystic obfuscation approach, the underlying functionality of the IP core is locked and normal FSM transitions are only available to authorized chip users. The synthesis results of ITC99 circuit benchmarks for ASIC 45nm technology reveal that the Mystic protection method imposes on average 5.14% area overhead, 5.21% delay overhead, and 8.06% power consumption overheads while it exponentially lowers the probability that an unauthorized user will gain access to or derive the chip functionality. |
DOI | 10.1109/ISVLSI.2018.00119 |
Citation Key | patooghy_mystic_2018 |