Fully integrable current-mode feedback suppressor as an analog countermeasure against CPA attacks in 40nm CMOS technology

Title	Fully integrable current-mode feedback suppressor as an analog countermeasure against CPA attacks in 40nm CMOS technology
Publication Type	Conference Paper
Year of Publication	2017
Authors	Bellizia, D., Scotti, G., Trifiletti, A.
Conference Name	2017 13th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME)
Keywords	Analog-level, circuit feedback, CMOS, CMOS analogue integrated circuits, CMOS logic circuits, CMOS technology, composability, correlation coefficient, correlation power analysis, CPA, CPA attacks, CPA-resistant cryptographic devices, cryptography, current-mode, current-mode circuits, data-dependency, fully integrable current-mode feedback suppressor, Internet of Things, IoT, Logic gates, Metrics, Microelectronic Security, MTD improvement, on-chip analog-level CPA countermeasure, Power Analysis Attack, power aware computing, power consumption, Power demand, pubcrawl, resilience, Resiliency, sensible data security, side channel attack, size 40 nm, system-on-chip, ultraconstrained IoT smart devices
Abstract	Security of sensible data for ultraconstrained IoT smart devices is one of the most challenging task in modern design. The needs of CPA-resistant cryptographic devices has to deal with the demanding requirements of small area and small impact on the overall power consumption. In this work, a novel current-mode feedback suppressor as on-chip analog-level CPA countermeasure is proposed. It aims to suppress differences in power consumption due to data-dependency of CMOS cryptographic devices, in order to counteract CPA attacks. The novel countermeasure is able to improve MTD of unprotected CMOS implementation of at least three orders of magnitude, providing a x1.1 area and x1.7 power overhead.
URL	http://ieeexplore.ieee.org/document/7974179/
DOI	10.1109/PRIME.2017.7974179
Citation Key	bellizia_fully_2017