Intra-Die-Variation-Aware Side Channel Analysis for Hardware Trojan Detection
Title | Intra-Die-Variation-Aware Side Channel Analysis for Hardware Trojan Detection |
Publication Type | Conference Paper |
Year of Publication | 2017 |
Authors | Hossain, F. S., Yoneda, T., Shintani, M., Inoue, M., Orailoglo, A. |
Conference Name | 2017 IEEE 26th Asian Test Symposium (ATS) |
ISBN Number | 978-1-5386-2437-1 |
Keywords | AES-128 circuit, automatic test pattern generation, combinational type Trojans, composability, cyber physical systems, delays, Detection sensitivity, efficient Trojan detection approach, elevated process variations, Hardware, hardware trojan, hardware Trojan detection, high detection sensitivity, integrated circuit design, integrated circuit testing, integrated circuits, intra-die-variation, invasive software, ISCAS 89 benchmark, ITC 99 benchmark, logic circuits, logic testing, Power based Side-channel, Power measurement, probability, process variation levels, Process Variations, pubcrawl, relative power difference, resilience, Resiliency, Sensitivity, sequential type Trojans, side channel analysis, spatial correlation, Systematics, test pattern generation, Trojan activation probability, trojan horse detection, Trojan horses, Trojan inserted circuits |
Abstract | High detection sensitivity in the presence of process variation is a key challenge for hardware Trojan detection through side channel analysis. In this work, we present an efficient Trojan detection approach in the presence of elevated process variations. The detection sensitivity is sharpened by 1) comparing power levels from neighboring regions within the same chip so that the two measured values exhibit a common trend in terms of process variation, and 2) generating test patterns that toggle each cell multiple times to increase Trojan activation probability. Detection sensitivity is analyzed and its effectiveness demonstrated by means of RPD (relative power difference). We evaluate our approach on ISCAS'89 and ITC'99 benchmarks and the AES-128 circuit for both combinational and sequential type Trojans. High detection sensitivity is demonstrated by analysis on RPD under a variety of process variation levels and experiments for Trojan inserted circuits. |
URL | https://ieeexplore.ieee.org/document/8267863/ |
DOI | 10.1109/ATS.2017.22 |
Citation Key | hossain_intra–variation-aware_2017 |
- Sensitivity
- logic testing
- Power based Side-channel
- Power measurement
- probability
- process variation levels
- Process Variations
- pubcrawl
- relative power difference
- resilience
- Resiliency
- logic circuits
- sequential type Trojans
- side channel analysis
- spatial correlation
- Systematics
- test pattern generation
- Trojan activation probability
- trojan horse detection
- Trojan horses
- Trojan inserted circuits
- hardware trojan
- automatic test pattern generation
- combinational type Trojans
- composability
- cyber physical systems
- delays
- Detection sensitivity
- efficient Trojan detection approach
- elevated process variations
- Hardware
- AES-128 circuit
- hardware Trojan detection
- high detection sensitivity
- integrated circuit design
- integrated circuit testing
- integrated circuits
- intra-die-variation
- invasive software
- ISCAS 89 benchmark
- ITC 99 benchmark