hardware trojan

biblio

Security-Driven Task Scheduling for Multiprocessor System-on-Chips with Performance Constraints

Submitted by grigby1 on Mon, 11/02/2020 - 1:36pm

pubcrawl
two-stage performance-constrained task scheduling algorithm
Trojan horses
task scheduling
Task Analysis
system-on-chip
System performance
system level security constraints
security-driven task scheduling
security of data
security
scheduling
Schedules
schedule length
Resiliency
resilience
composability
Processor scheduling
policy-based governance
performance constraints
Multiprocessor System-on-Chips
multiprocessing systems
MPSoC
malicious inclusions
logic design
IP networks
intellectual property security
industrial property
hardware trojan
Hardware
graph theory
delays

biblio

Property Based Formal Security Verification for Hardware Trojan Detection

Submitted by grigby1 on Mon, 11/02/2020 - 1:35pm

Resiliency
invasive software
Logic gates
malicious Hardware Trojans
modern computer hardware
policy-based governance
pubcrawl
register transfer level information flow security models
resilience
intellectual property security
secret information
security
security behavior
Security Properties
Semantics
Theorem Proving
third-party intellectual property cores
Trojan horses
golden reference design
composability
Coq
fine grained gate level information flow model
formal representations
formal security verification
Formal Specification
formal verification
formal verification method
Complexity theory
Hardware
hardware designs
Hardware Security
hardware trojan
industrial property
information flow analysis
Integrated circuit modeling

biblio

Data Injection Attack Against Electronic Devices With Locally Weakened Immunity Using a Hardware Trojan

Submitted by grigby1 on Fri, 09/18/2020 - 2:07pm

information and communication devices
electromagnetic changes
electromagnetic interference
Electromagnetic scattering
electromagnetic waves
electronic devices
hardware trojan
high-power electromagnetic environments
IEMI
Immunity testing
electrical signal
integrated circuit reliability
intentional electromagnetic interference
local immunity
locally weakened immunity
low-tolerance IC
low-tolerance integrated circuits
serial communication systems
command injection attacks
Metrics
pubcrawl
resilience
Resiliency
Hardware
telecommunication security
integrated circuits
composability
telecommunication channels
security of data
Electromagnetics
Fault injection
attack targets
communication channel
Communication channels
data injection attack
device availability reduction
device immunity

biblio

A Benchmark Suite of Hardware Trojans for On-Chip Networks

Submitted by grigby1 on Fri, 05/15/2020 - 12:45pm

Information Leakage
Trojan horses
system-on-chip
standards
side channel analysis
security
Routing
performance degradation
on-chip networks
NoC
network-on-chip
multiprocessing systems
multicore systems
manycore systems
invasive software
network on chip security
HT defense methods
Hardware Trojans
hardware trojan
Hardware
Functional testing
Cryptography
benchmarks
Benchmark testing
benchmark suite
Metrics
Resiliency
resilience
Scalability

biblio

Run Time Mitigation of Performance Degradation Hardware Trojan Attacks in Network on Chip

Submitted by grigby1 on Fri, 05/15/2020 - 12:30pm

hardware trojan
Trojan horses
system-on-chip
semiconductor design
security
run time mitigation
performance degradation Hardware Trojan attacks
NoC
network-on-chip
multiprocessor system on chips
multiprocessing systems
MPSoC
microprocessor chips
integrated circuit design
performance evaluation
Router Architecture
pubcrawl
hardware security issues
Hardware
denial of service attack
Degradation
Cryptography
cryptographic modules
computer architecture
Buffer storage
bit shuffling mechanism
Metrics
resilience
Resiliency
Scalability
network on chip security

biblio

Secure Network-on-Chip Architectures for MPSoC: Overview and Challenges

Submitted by grigby1 on Fri, 05/15/2020 - 12:29pm

multiprocessing systems
Trojan horses
security threat attacks
security
secure routing algorithms
secure routing algorithm
secure network-on-chip architectures
Routing
processing cores
NoC-based systems
NoC
network-on-chip
multiprocessor-based systems on chip
pubcrawl
MPSoC
Malicious-Tolerant Routing Algorithms
HT
hardware trojan
Hardware
data communication
computer architecture
Metrics
resilience
Resiliency
Scalability
network on chip security

biblio

Analysis of Black Hole Router Attack in Network-on-Chip

Submitted by grigby1 on Mon, 03/23/2020 - 4:15pm

Resiliency
Multiprocessors System-on-Chip
network-on-chip
network on chip security
NoC
outsourcing
outsourcing design
Packet loss
processing cores
pubcrawl
resilience
multiprocessing systems
Router Systems Security
Scalability
security
security attacks
sensitive information
System performance
telecommunication network routing
Trojan horses
very strong violent attack
Hardware
BHR attack
Black Hole Router attack
black holes
Blak Hole
communication platform
computer network security
data packets
denial of service attack
Denial-of-Service
DoS.
BHR
hardware trojan
HT
HT model
infected node
Integrated circuit modeling
invasive software
malicious Hardware Trojan
malicious nodes
Metrics

biblio

Stealthy Trojan Detection Based on Feature Analysis of Circuit Structure

Submitted by aekwall on Mon, 03/16/2020 - 10:39am

pubcrawl
trustiness verification methods
Stealthy Trojan node
stealthy Trojan detection
stealthy
static detection method
scalable verification framework
scalable verification
Scalability
Resiliency
circuit structure
Predictive Metrics
malicious HT
ISCAS benchmarks
invasive software
hardware trojan
formal verification
feature analysis
design methods
Compositionality

biblio

Time-Related Hardware Trojan Attacks on Processor Cores

Submitted by grigby1 on Wed, 02/26/2020 - 4:39pm

real-time clock
Trojan horses
trojan horse detection
trigger conditions
time-related Hardware Trojan attacks
time information
system power-on
supply chain security
specific time period passes
specific realworld time
RISC-V processor
Resiliency
resilience
relative-time based Trojan
real-time systems
real-time clock circuits
Clocks
Random access memory
pubcrawl
Payloads
modern electronic systems
microprocessor chips
Kernel
invasive software
internal information
Hardware Trojan designs
hardware trojan
Hardware
extra power consumption
design security
cyber physical systems

biblio

Hardware Trojan Insertion and Detection in Asynchronous Circuits

Submitted by grigby1 on Wed, 02/26/2020 - 4:38pm

neural network
Trojan horses
trojan horse detection
Trojan detection methods
synchronous hardware Trojan
supply chain security
Routing
Resiliency
resilience
Random Forest
pubcrawl
Pipelines
asynchronous circuit
logic design
Latches
hardware Trojan threats
hardware Trojan insertion
hardware trojan
Hardware
delays
deep learning
cyber physical systems
asynchronous hardware Trojan circuits
asynchronous circuits

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Cyber-Physical Systems Virtual Organization

Read-only archive of site from September 29, 2023.

hardware trojan

Security-Driven Task Scheduling for Multiprocessor System-on-Chips with Performance Constraints

Property Based Formal Security Verification for Hardware Trojan Detection

Data Injection Attack Against Electronic Devices With Locally Weakened Immunity Using a Hardware Trojan

A Benchmark Suite of Hardware Trojans for On-Chip Networks

Run Time Mitigation of Performance Degradation Hardware Trojan Attacks in Network on Chip

Secure Network-on-Chip Architectures for MPSoC: Overview and Challenges

Analysis of Black Hole Router Attack in Network-on-Chip

Stealthy Trojan Detection Based on Feature Analysis of Circuit Structure

Time-Related Hardware Trojan Attacks on Processor Cores

Hardware Trojan Insertion and Detection in Asynchronous Circuits