multiprocessing systems

biblio

Arithmetic Circuit Homomorphic Encryption and Multiprocessing Enhancements

Submitted by aekwall on Mon, 12/30/2019 - 11:36am

Homomorphic encryption
TFHE library
OpenMP
multiprocessing enhancements
multiplication operation
MPI
latency reduction
Boolean Circuit
arithmetic operations
arithmetic circuit homomorphic encryption
Arithmetic Algorithm
arithmetic
adders
Informatics
Cloud Computing
multiprocessing systems
Registers
Human Factors
cloud services
Logic gates
Libraries
Metrics
pubcrawl
Resiliency
encryption
Cryptography
Scalability

biblio

Routing Aware and Runtime Detection for Infected Network-on-Chip Routers

Submitted by grigby1 on Mon, 11/04/2019 - 11:39am

NoC
Trojan horses
system-on-chip
System recovery
security attacks
security
secure routing algorithm
secret key leaking
runtime detection
Runtime
Routing
Router Systems Security
Resiliency
resilience
pubcrawl
outsourcing
network on chip security
network-on-chip architecture
network-on-chip
network routing
Multiprocessors System-on-Chip
multiprocessing systems
MPSoC
Metrics
Malicious-tolerant Routing Algorithm
malicious Hardware Trojans
logic design
invasive software
integrated circuits
hardware trojan
Hardware

biblio

Light Database Encryption Design Utilizing Multicore Processors for Mobile Devices

Submitted by aekwall on Mon, 11/04/2019 - 10:23am

Resiliency
multiprocessing systems
parallel database encryption system
parallel databases
Performance
performance evaluation
pubcrawl
RDBMS
relational database security
relational databases
Multicore processing
Scalability
smart phones
SQLite databases
SQLite RDBMS
SQLite-XTS
storage management
storage security
user sensitive data
XTS encryption
full disk encryption
composability
Cryptography
data confidentiality
Data protection
Databases
device processing resources
embedded devices
embedded systems
encryption
commodity multicore processors
handheld devices
Human behavior
light database encryption design
massive storage systems
Metrics
mobile computing
mobile devices
multicore CPU
multicore computing security

biblio

Functionality and Security Co-Design Environment for Embedded Systems

Submitted by grigby1 on Thu, 02/14/2019 - 10:23am

recovery
Hardware
hardware development
intelligence surveillance and reconnaissance sensors
Lincoln asymmetric multicore processing architecture
Mission Assurance
mission functions
Multicore processing
multiprocessing systems
pubcrawl
functionality
resilience
resilient embedded system
Secure Processing
security
software development
Sophisticated Attacks
surveillance
System recovery
testbed
computer network security
Resiliency
adversarial cyber effects
anomalies detection
asymmetric multicore processing
Availability
co-design
co-design environment
command and control systems
Complexity theory
Resilient Security Architectures
critical missions
Cryptography
deliberate attacks
department of defense mission systems
DoD
electronic signal intelligence systems
electronic warfare
embedded systems

biblio

A security-aware routing implementation for dynamic data protection in zone-based MPSoC

Submitted by grigby1 on Mon, 06/11/2018 - 2:24pm

multiprocessing systems
network on chip security
Zones
security-aware routing
network-on-chip routing
network routing
multiprocessor system-on-chip
MPSoC
Encapsulation
asymmetrical security zones
Firewalls (computing)
Runtime
NoC
Routing protocols
Metrics
resilience
Routing
IP networks
Data protection
network-on-chip
Scalability
Resiliency
pubcrawl
security

biblio

DAS: An Efficient NoC Router for Mixed-Criticality Real-Time Systems

Submitted by grigby1 on Wed, 05/09/2018 - 2:01pm

NoC router
worst-case communication latency
wormhole and store and forward technique
Wormhole
virtual channel
Switches
Store And Forward
Software
security
Router Systems Security
Router Systems
Resiliency
resilience
real-time systems
pubcrawl
Ports (Computers)
computer architecture
network-on-chip
network use rate
network routing
multiprocessing systems
multiple virtual channels
mixed-criticality systems
Metrics
MCS
low-critical flow
high-critical flows
double arbiter and switching router
delays
DAS
cycle-accurate SystemC NoC simulator

biblio

Acceleration of RSA processes based on hybrid ARM-FPGA cluster

Submitted by grigby1 on Wed, 02/21/2018 - 12:38pm

resilience
MPI
Multicore Computing
multicore computing security
multicore desktop
multiprocessing systems
node-to-node communication
none-subtraction Montgomery algorithm
Program processors
pubcrawl
public key cryptography
microprocessor chips
Resiliency
RSA
RSA algorithm
RSA processes acceleration
Scalability
software-hardware cooperation
system-on-chip
Xilinx Zynq SoC
Zynq
FPGA fabric
Algorithm design and analysis
ARM CPU
Chinese remainder theorem
cluster
cluster infrastructure
Clustering algorithms
computer architecture
CRT
field programmable gate arrays
Acceleration
Hardware
Heterogeneous
hybrid architectures
hybrid ARM-FPGA cluster
Intel i7-3770
many-core server
message passing
message passing interface
Metrics

biblio

Multicore implementation of EME2 AES disk encryption algorithm using OpenMP

Submitted by grigby1 on Wed, 02/21/2018 - 12:38pm

multicore computing security
standards
Speed up
Software algorithms
Scalability
Resiliency
resilience
pubcrawl
Organizations
multiprocessing systems
Multicore processing
multicore implementation
AES
Multicore Computing
multicore compatible parallel implementation
Metrics
full disk encryption
encryption
Encrypt Mix Encrypt V2 Advanced Encryption Standard
EME2 AES disk encryption algorithm
EME2 AES
Cryptography
computational complexity

biblio

Hermes: Secure heterogeneous multicore architecture design

Submitted by grigby1 on Wed, 02/21/2018 - 12:37pm

Program processors
trust-aware routing algorithm
tenant security
system-on-chip
system-level integration
SoC design
security
secure heterogeneous multicore architecture design
secure cores
Scalability
Resiliency
resilience
pubcrawl
programmable secure router interface
programmable RISC cores
programmable distributed group key management scheme
accelerator function units
nonsecure cores
multiprocessing systems
multiple processing elements
multilevel user-defined security
Multicore processing
multicore computing security
Multicore Computing
Metrics
Hermes architecture
Hardware
general-purpose system-on-chip architectures
DSP
ASIC
application executable code

biblio

Confidentiality and Authenticity in a Platform Based on Network-on-Chip

Submitted by grigby1 on Wed, 02/21/2018 - 12:37pm

network performance
SoCIN-based systems
silicon overhead
Security Properties
security mechanisms
security aspects
security
Scalability
Resiliency
resilience
reference multicore platform
pubcrawl
Program processors
processing elements
networks-on-chip
network-on-chip
advanced encryption standard
network level
Network interfaces
multiprocessing systems
multicore computing security
Multicore Computing
Metrics
Many-core systems
low-cost interconnect architecture
encryption
Cryptography
confidentiality
computer architecture
authenticity
AES model

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Cyber-Physical Systems Virtual Organization

Read-only archive of site from September 29, 2023.

multiprocessing systems

Arithmetic Circuit Homomorphic Encryption and Multiprocessing Enhancements

Routing Aware and Runtime Detection for Infected Network-on-Chip Routers

Light Database Encryption Design Utilizing Multicore Processors for Mobile Devices

Functionality and Security Co-Design Environment for Embedded Systems

A security-aware routing implementation for dynamic data protection in zone-based MPSoC

DAS: An Efficient NoC Router for Mixed-Criticality Real-Time Systems

Acceleration of RSA processes based on hybrid ARM-FPGA cluster

Multicore implementation of EME2 AES disk encryption algorithm using OpenMP

Hermes: Secure heterogeneous multicore architecture design

Confidentiality and Authenticity in a Platform Based on Network-on-Chip