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Cyber-Physical Systems Virtual Organization
Read-only archive of site from September 29, 2023.
CPS-VO
reverse engineering
biblio
Identifying Ubiquitious Third-Party Libraries in Compiled Executables Using Annotated and Translated Disassembled Code with Supervised Machine Learning
Submitted by aekwall on Mon, 02/22/2021 - 1:44pm
Databases
vector
Matrices
k-nearest neighbor search
clustering methods
Bayes method
nearest neighbor search
supervised learning
Classification algorithms
Microprogramming
Predictive Metrics
reverse engineering
Software
Measurement
neural network
supply chain management
Libraries
tools
internet
graph theory
pubcrawl
machine learning
Support vector machines
Task Analysis
biblio
BLESS: A BLE Application Security Scanning Framework
Submitted by grigby1 on Mon, 12/28/2020 - 12:29pm
BLE Security Scan framework
IoT security
secure communication
Biomedical monitoring
bluetooth security
1073 BLE apps
BLE application Security scanning framework
BLE attacks
BLE based devices
Application Layer
BLE Security Scanning
BLE-based device
BLESS
Blood pressure
pairing strategies
physical security
reverse engineering
widely adopted wireless communication technology
telecommunication security
encryption
Internet of Things
security of data
Bluetooth
pubcrawl
Human behavior
resilience
Resiliency
Cryptography
IoT device
Cryptographic Protocols
authentication
Protocols
public key cryptography
composability
bluetooth low energy
biblio
Two-Stage Architectures for Resilient Lightweight PUFs
Submitted by aekwall on Mon, 11/16/2020 - 2:59pm
reverse engineering
Resilient Security Architectures
Product codes
physical unclonable function (PUF)
Maximum likelihood decoding
integrated circuit reliability
Differential Comparator PUF
Current Mirror PUF
arbiter PUF
Transistors
Threshold voltage
Binary codes
security of data
resilience
Decoding
program testing
machine learning
pubcrawl
Resiliency
invasive software
security
Internet of Things
field programmable gate arrays
biblio
A Cellular Automata Guided Obfuscation Strategy For Finite-State-Machine Synthesis
Submitted by aekwall on Mon, 11/09/2020 - 1:41pm
reverse engineering
testable key-controlled FSM synthesis scheme
state-transition
reverse engineering attacks
nongroup additive cellular automata
finite-state-machine synthesis
digital system
D1*CAdual
D1*CA
cellular automata guided obfuscation strategy
ip protection
IP piracy
cellular automata
security
flip-flops
Additives
finite state machines
Silicon
automata
industrial property
Logic gates
policy-based governance
composability
pubcrawl
Resiliency
biblio
Mesh Based Obfuscation of Analog Circuit Properties
Submitted by aekwall on Mon, 11/09/2020 - 1:41pm
satisfiability modulo theory based algorithm
Design methodology
effective transistor dimensions
enhanced security
key based obfuscation technique
LC tank voltage-controlled oscillator
mesh topology
obfuscated circuitry
obfuscated transistors
obfuscation methodology
physical dimensions
SAT
circuit functionality
SMT
target frequency
transistor circuits
transistor sizes
Transistors
varactor transistor
Varactors
VCO
voltage amplitude
voltage-controlled oscillators
encryption key
Resiliency
pubcrawl
composability
policy-based governance
probability
Topology
reverse engineering
computability
operating frequency
Threshold voltage
Cryptography
circuit design
IP piracy
2×6 mesh structure
analog circuit properties
Analog circuits
analog obfuscation
analog satisfiability algorithm
aSAT algorithm
auto-determine
Brute Force Attack
biblio
DLockout: A Design Lockout Technique for Key Obfuscated RTL IP Designs
Submitted by aekwall on Mon, 11/09/2020 - 1:40pm
nondestructive manner
Datapath
datapath intensive IPs
Design Lockout
DLockout
key obfuscated RTL IP designs
key obfuscated RTL module
key obfuscation
key-based obfuscation techniques
legacy IP
common side-channel attacks
obfuscation logic output
overproduction
robust design lockout technique
RTL Obfuscation
semiconductor supply chain
storage capacity 128 bit
storage capacity 32 bit
storage capacity 64 bit
typical design corner
Computer crime
Cryptography
Hardware
security
Software
Resiliency
pubcrawl
composability
policy-based governance
logic locking
IP networks
process control
reverse engineering
Integrated circuit modeling
Registers
logic circuits
controller
IP piracy
applied key
biblio
A Novel PUF based Logic Encryption Technique to Prevent SAT Attacks and Trojan Insertion
Submitted by aekwall on Mon, 11/09/2020 - 1:33pm
intellectual property/IC
IP piracy
SAT attack
hardware obfuscation
Anti-Trojan insertion algorithm
Controllability
copy protection
design-for-trust
hardware Trojan insertion
HT insertion
hardware trojan
logic encryption methods
logic encryption techniques
logic locking
PUF based logic encryption technique
PUF-based encryption
Rare Signal
reverse engineering attack
unique encryption
Hardware Security
encryption
Hardware
invasive software
Resiliency
pubcrawl
composability
policy-based governance
Trojan horses
integrated circuits
Cryptography
Topology
Logic gates
industrial property
reverse engineering
integrated circuit design
logic circuits
Physical Unclonable Function
encryption key
biblio
Mystic: Mystifying IP Cores Using an Always-ON FSM Obfuscation Method
Submitted by aekwall on Mon, 11/09/2020 - 1:32pm
integrated circuit industry
IP piracy
application specific integrated circuits
ASIC technology
circuit complexity
combinational circuits
finite state machine
FSM obfuscation method
hardware obfuscation method
Hardware Security
IP overproduction
ITC99 circuit benchmarks
logic encryption
Logic masking
Mystic obfuscation approach
Mystic protection method
mystifying IP cores
Logic gates
Hardware
Resiliency
pubcrawl
composability
policy-based governance
Production
Complexity theory
microprocessor chips
IP networks
obfuscation
reverse engineering
encoding
finite state machines
logic circuits
logic design
size 45.0 nm
biblio
Deceive the Attacker: Thwarting IP Theft in Sieve-Valve-based Biochips
Submitted by grigby1 on Mon, 11/02/2020 - 12:29pm
real-life biochips
IP theft
Lab-on-a-Chip
Microfluidics
Mixers
Multiplexing
obfuscated biochips
policy-based governance
practical sieve-valve based obfuscation
pubcrawl
IP networks
resilience
Resiliency
reverse engineering
security of data
Sequential analysis
sieve-valve-based biochips
sieve-valves
Valves
computer network security
bioassay developer
bioassay implementation
biochip building blocks
biochips
biological techniques
Biomembranes
bioMEMS
composability
attacker
control signals
cost-security trade-offs
desieve
highly-skilled-person-hour investment
industrial property
intellectual property rights
intellectual property security
internet
biblio
An Orthogonal Algorithm for Key Management in Hardware Obfuscation
Submitted by grigby1 on Mon, 11/02/2020 - 12:28pm
member leakage attack
supply chain management
Supply Chain
semiconductor chips
security
reverse engineering
Resiliency
resilience
pubcrawl
Protocols
policy-based governance
partnership organization
orthogonal obfuscation algorithm
Orthogonal obfuscation
orthogonal matrix
microprocessor chips
authenticate obfuscation keys
Licenses
IP piracy attacks
IP piracy
IP networks
IP cores
intellectual property security
intellectual property piracy attacks
integrated circuits
integrated circuit design
industrial property
Hardware Security
Hardware
copy protection
composability
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