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Cyber-Physical Systems Virtual Organization
Read-only archive of site from September 29, 2023.
CPS-VO
Clocks
biblio
The undetectable clock cycle sensitive hardware trojan
Submitted by grigby1 on Wed, 02/21/2018 - 1:41pm
Hardware
Trusted design
Trojan horses
trees (mathematics)
Resiliency
resilience
redundant circuits
pubcrawl
Microelectronic Security
Metrics
invasive software
HT
Hardware Trojans
Circuit faults
FSM
finite state machines
finite state machine
embedded systems
embedded clock-cycle-sensitive hardware trojans
delays
Cryptography chips
Cryptography
critical path
composability
Clocks
clock tree structure
biblio
Using timed automata and fuzzy logic for diagnosis of multiple faults in DES
Submitted by grigby1 on Thu, 02/15/2018 - 11:47am
identification phase
Valves
timed automata
temporal parameters
temporal evolution
sensors
Resiliency
resilience
pubcrawl
normal operation
multiple fault diagnosis
monitoring time operation
Monitoring
Metrics
Mathematical model
location
actuators
Human Factors
human factor
Human behavior
Fuzzy logic
filling system
faulty operation
fault diagnosis
failure diagnosis
discrete event systems
Diagnosis
DES
default
Clocks
automata theory
automata
biblio
Large-Scale Classification of IPv6-IPv4 Siblings with Variable Clock Skew
Submitted by grigby1 on Tue, 02/06/2018 - 2:05pm
machine-learned decision tree
variable clock skew
transport protocols
Training
TCP timestamps
Servers
Resiliency
pubcrawl
pattern classification
Network reconnaissance
network characteristics
Clocks
learning (artificial intelligence)
large-scale classification
IPv6-IPv4 siblings
IPv6 addresses
IPv4 addresses
IP networks
internet
Hardware
feature extraction
Decision trees
biblio
Advanced Methodologies to Deter Internal Attacks in PTP Time Synchronization Networks
Submitted by grigby1 on Tue, 02/06/2018 - 1:59pm
network infrastructures
trusted platform modules
time synchronization supervisors
time synchronization
Synchronization
synchronisation
security
Resiliency
public key infrastructures
public key cryptography
pubcrawl
PTP time synchronization networks
Protocols
precision time protocol
network intrusion detection systems
accurate time synchronization
microsecond level
IP networks
internal attacks
industrial environments
device time synchronization
delays
cyber-attacks
Cyber Attacks
Cryptography
computer network security
computer network
composability
Clocks
biblio
Dynamically obfuscated scan for protecting IPs against scan-based attacks throughout supply chain
Submitted by grigby1 on Tue, 01/23/2018 - 3:21pm
Resiliency
ip protection
Logic gates
noninvasive scan attacks
pattern generation time
Policy
policy-based governance
pubcrawl
Registers
intellectual property
scan-based attacks
scan-based test
Secure Scan
security
Supply Chain
supply chains
Testability
automatic test pattern generation
integrated circuits
integrated circuit testing
integrated circuit test flow
integrated circuit manufacturing
integrated circuit manufacture
integrated circuit design
industrial property
EDA generated scan chains
dynamically-obfuscated scan design
Discrete Fourier transforms
composability
collaboration
Clocks
chip security
boundary scan testing
biblio
Analysis of asymmetric encryption scheme, AA \#x03B2; Performance on Arm Microcontroller
Submitted by grigby1 on Tue, 12/12/2017 - 1:25pm
Internet of Things
system-on-chip
system on chip
sensors
security protection
security
Scalability
Resiliency
random-access storage
Random access memory
public key cryptography
Public key
pubcrawl
microcontrollers
Metrics
Libraries
AA-Beta
Instruction cache
GNU multiple precision arithmetic library package
encryption
embedded microcontroller
Elliptic curve cryptography
digital arithmetic
Data Cache
Clocks
cache storage
asymmetric encryption scheme
Asymmetric
arm microcontroller
ARM Cortex-M7 microcontroller
AAβ
biblio
Image security using Arnold method in tetrolet domain
Submitted by grigby1 on Mon, 11/13/2017 - 11:55am
iterative based Arnold transform
visual information
Transforms
Time Frequency Analysis
Tetrolet transform
tetrolet domain
security
Scalability
Resiliency
pubcrawl
Metrics
Iterative methods
Arnold method
image texture
image security
Image coding
hidden information
frequency-domain analysis
Entropy
encryption
Clocks
block shuffling
Arnold transforms
biblio
Persistent Clocks for Batteryless Sensing Devices
Submitted by grigby1 on Thu, 05/18/2017 - 3:28pm
batteryless
Clocks
CRFID
pubcrawl
remanence
Remanence timekeepers
Resiliency
RTC
SRAM
biblio
A flexible system-on-a-chip implementation of the Advanced Encryption Standard
Submitted by grigby1 on Thu, 04/20/2017 - 12:41pm
network on chip
Xilinx Zynq 7000
system-on-chip
System-on-a-chip
symmetric encryption
standards
security
Scalability
resource usage
Resiliency
Registers
pubcrawl
processor
peripheral interfaces
network security
network on chip security
advanced encryption standard
hardware-software approach
flexible system-on-a-chip
flexible interface
field programmable gate arrays
encryption algorithm
encryption
Cryptography
composability
complex electronic systems
Clocks
cipher block chaining mode
CBC
AES
advanced peripheral bus
biblio
FPGA based hardware implementation of AES Rijndael algorithm for Encryption and Decryption
Submitted by grigby1 on Thu, 04/20/2017 - 12:40pm
secure data transmission
Inverse S-Box transformations
network on chip
network on chip security
network security algorithm
pre-calculated look-up tables
precalculated LUT
pubcrawl
Resiliency
Rijndael
Scalability
inverse mix-columns transformations
Table lookup
timing
Verilog-HDL
Virtex-7 XC7VX690T chip
wired digital communication networks
wireless digital communication networks
Xilinx ISE Design Suite-14.7 Tool
Xilinx Virtex-7 FPGA
Xilinx XPower Analyzer
decryption
AES-128
AES-192
AES-256
AES Rijndael algorithm
Algorithm design and analysis
algorithmic functions
Clocks
composability
Cryptography
advanced encryption standard (AES)
encryption
Field Programmable Gate Array (FPGA)
field programmable gate arrays
FPGA based hardware implementation
Galois field multiplications
Galois fields
GF (28)
Hardware Description Language (HDL)
hardware description languages
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