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Cyber-Physical Systems Virtual Organization
Read-only archive of site from September 29, 2023.
CPS-VO
microprocessor chips
biblio
Time-Related Hardware Trojan Attacks on Processor Cores
Submitted by grigby1 on Wed, 02/26/2020 - 4:39pm
real-time clock
Trojan horses
trojan horse detection
trigger conditions
time-related Hardware Trojan attacks
time information
system power-on
supply chain security
specific time period passes
specific realworld time
RISC-V processor
Resiliency
resilience
relative-time based Trojan
real-time systems
real-time clock circuits
Clocks
Random access memory
pubcrawl
Payloads
modern electronic systems
microprocessor chips
Kernel
invasive software
internal information
Hardware Trojan designs
hardware trojan
Hardware
extra power consumption
design security
cyber physical systems
biblio
Multi-core Heterogeneous Video Processing System Design
Submitted by aekwall on Mon, 02/10/2020 - 11:58am
image binarization
multicore computing security
Zynq
Xilinx Zynq platform
real-time video image processing system
Otsu binarized hardware-accelerated IP
otsu adaptive binarization
multicore heterogeneous video processing system design
multicore heterogeneous computing technology
multicore heterogeneous acceleration processing
multi-core heterogeneous
image processing speed
field programmable gate arrays
hardware acceleration
multiprocessing systems
microprocessor chips
video signal processing
Metrics
pubcrawl
Resiliency
system-on-chip
Scalability
IP networks
biblio
SATIN: A Secure and Trustworthy Asynchronous Introspection on Multi-Core ARM Processors
Submitted by aekwall on Mon, 02/10/2020 - 11:57am
security of data
pubcrawl
Resiliency
SATIN
Scalability
secure introspection mechanism
secure world checking solutions
secure world introspection
security
operating systems (computers)
security policy violations
security protection
Trusted Computing
Trusted Execution Environment
trustworthy asynchronous introspection mechanism
Trustworthy Systems
TrustZone security extension
Mobile handsets
Asynchronous Introspection
composability
cyber physical systems
Evasion Attack
Instruction sets
Kernel
Metrics
microprocessor chips
ARM development board
multicore ARM processors
multicore ARM system
multicore computing security
Multicore processing
multiprocessing systems
normal world snapshot
normal-world evasion attack
biblio
Research of Secure Communication of Esp32 IoT Embedded System to.NET Core Cloud Structure Using MQTTS SSL/TLS
Submitted by grigby1 on Mon, 02/10/2020 - 11:31am
JSON type data format
TLS/SSL
Temperature sensors
SSL/TLS certificate
SSL Trust Models
secure communication
Scalability
Resiliency
resilience
pubcrawl
Protocols
protocol
MQTTS protocol
MQTTS
microprocessor chips
Metrics
.NET core cloud structure
IoT device
IoT Cloud
IoT
Internet of Things
humidity sensors
Human Factors
Human behavior
Esp32 Wrover
Esp32 IoT embedded system
encrypted communication
embedded systems
Embedded System
Cryptography
Cloud Computing
cloud
biblio
Performance evaluation of lightweight Block Ciphers in soft-core processor
Submitted by aekwall on Mon, 01/20/2020 - 11:59am
light emitting diodes
Throughput
Software
soft-core processor
Scalability
RFID devices
Resiliency
pubcrawl
PRESENT crypto ciphers
PICCOLO crypto ciphers
microprocessor chips
lightweight cryptography algorithms
lightweight cryptography
Lightweight Ciphers
lightweight blocks crypto ciphers
lightweight block ciphers
AHB bandwidth
LEON3 processor
LEON3 open source processor
LED crypto ciphers
LBlock crypto ciphers
IoT
Internet of Things
HIGHT crypto ciphers
FPGA
field programmable gate arrays
execution time
encryption
Cryptography
CPU performance
Ciphers
biblio
Formal Security Verification of Concurrent Firmware in SoCs Using Instruction-Level Abstraction for Hardware*
Submitted by grigby1 on Tue, 12/17/2019 - 12:21pm
resilience
Metrics
microprocessor chips
Microprogramming
multi-threading
multithreaded program verification problem
Predictive Metrics
program verification
pubcrawl
intellectual property security
Resiliency
Secure Boot design
security of data
SoC security verification
software verification techniques
system-on-chip
Systems-on-Chip
cyber-physical systems
architecture level
bit-precise reasoning
cognition
composability
Concurrency
concurrency (computers)
concurrent firmware
cyber-physical system
Access Control
firmware
firmware-visible behavior
formal security verification
Frequency modulation
Hardware
Instruction-Level Abstraction
intellectual property blocks
biblio
On-chip Data Security Against Untrustworthy Software and Hardware IPs in Embedded Systems
Submitted by aekwall on Wed, 05/01/2019 - 12:42pm
security of data
memory security
Metrics
microprocessor chips
on-chip memory blocks
pubcrawl
reconfigurable logic fabric
Resiliency
security
memory protection unit
security services
SoC FPGA
software IP
static detection methods
system-on-chip
third-party IP cores
third-party IPs
3PIP
memory protection design
memory access
low-latency hardware
IP networks
Intel DE1-SoC board
implementation
hierarchical top-down structure
Hardware
golden reference model
FPGA-based embedded systems
field programmable gate arrays
embedded systems
dual-core ARM processor
Cryptography
composability
biblio
H-Securebox: A Hardened Memory Data Protection Framework on ARM Devices
Submitted by grigby1 on Mon, 01/21/2019 - 12:17pm
security
memory data protection strategies
Metrics
microprocessor chips
operating system kernels
privacy
private data
pubcrawl
Resiliency
low power consumption
smart phones
types H-Securebox
Virtual machine monitors
virtual machines
virtualisation
Virtualization
virtualization privacy
ARM hardware virtualization technique
kernel-level memory data
kernel privilege
kernel level attack
Kernel
IoT devices
Internet of Things
hypervisor privilege
Human behavior
Hardware
hardened memory data protection framework
H-Securebox system
embedded systems
data privacy
composability
ARM Hypervisor
biblio
Improving Power amp; Latency Metrics for Hardware Trojan Detection During High Level Synthesis
Submitted by grigby1 on Mon, 12/10/2018 - 11:42am
Mathematical model
work factor metrics
Unroll Factor
Trojan horses
third party IP cores
Space exploration
semiconductor industry
secure IC design process
Scalability
resource allocation
Resiliency
resilience
pubcrawl
power metrics
power consumption
microprocessor chips
adders
latency metrics
invasive software
integrated circuits
integrated circuit design
integrated chip design
high level synthesis
hardware Trojan detection
hardware trojan
Hardware
design-for-trust techniques
design space exploration process
Design Space Exploration
datapath resource allocation
cuckoo search algorithm
Benchmark testing
biblio
Performance analysis of symmetric block cryptosystems on Android platform
Submitted by grigby1 on Wed, 02/21/2018 - 1:46pm
resilience
microprocessor chips
mobile communications
multicore CPUs
parallel processing
parallelization
parameter selection
Performance analysis
plaintext size
Protocols
pubcrawl
Metrics
Resiliency
Scalability
software resources
standards
symmetric block ciphers
symmetric block cryptosystems
symmetric ciphers
terminal devices
Three-dimensional displays
variable parameters
cryptosystem performance
AES
android encryption
Android platform
Androids
appropriate cryptosystem
authentication
Ciphers
core element
cryptographic communications systems
Cryptography
3DES
different operating modes
encryption
hardware resources
Human behavior
Human Factors
Humanoid robots
integrity
key size
message confidentiality
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