Skip to Main Content Area
CPS-VO
Contact Support
Browse
Calendar
Announcements
Repositories
Groups
Search
Search for Content
Search for a Group
Search for People
Search for a Project
Tagcloud
› Go to login screen
Not a member?
Click here to register!
Forgot username or password?
Cyber-Physical Systems Virtual Organization
Read-only archive of site from September 29, 2023.
CPS-VO
microprocessor chips
biblio
Acceleration of RSA processes based on hybrid ARM-FPGA cluster
Submitted by grigby1 on Wed, 02/21/2018 - 12:38pm
resilience
MPI
Multicore Computing
multicore computing security
multicore desktop
multiprocessing systems
node-to-node communication
none-subtraction Montgomery algorithm
Program processors
pubcrawl
public key cryptography
microprocessor chips
Resiliency
RSA
RSA algorithm
RSA processes acceleration
Scalability
software-hardware cooperation
system-on-chip
Xilinx Zynq SoC
Zynq
FPGA fabric
Algorithm design and analysis
ARM CPU
Chinese remainder theorem
cluster
cluster infrastructure
Clustering algorithms
computer architecture
CRT
field programmable gate arrays
Acceleration
Hardware
Heterogeneous
hybrid architectures
hybrid ARM-FPGA cluster
Intel i7-3770
many-core server
message passing
message passing interface
Metrics
biblio
Generalize or Die: Operating Systems Support for Memristor-Based Accelerators
Submitted by grigby1 on Fri, 02/02/2018 - 12:25pm
memristors
ultra low energy
typical OS functionality
transistor feature size scaling
specialized accelerators
scientific computing
Scalability
Resiliency
quantum computing security
pubcrawl
programming
primary function
operating systems (computers)
operating system
microprocessor chips
Metrics
accelerator implementation
Memristor
master slave models
machine learning
learning (artificial intelligence)
Imaging
hardware resources
Hardware
general purpose system
field programmable gate arrays
Engines
Electronic mail
Dot Product Engine
computer architecture
composability
biblio
MUTARCH: Architectural diversity for FPGA device and IP security
Submitted by grigby1 on Tue, 01/23/2018 - 2:24pm
policy-based governance
IP security
logical configuration keys
logic circuits
microprocessor chips
modern remote upgrade techniques
MUTARCH
physical configuration keys
Policy
IP piracy
pubcrawl
Resiliency
security through diversity principle
static keys
Table lookup
time-varying keys
Transforms
unauthorized in-field reprogramming
field programmable gate arrays
automotive systems
biomedical systems
bitstream encryption
collaboration
composability
configuration file
diverse applications
encryption
architectural diversity
FPGA device
Hardware
in-field reconfiguration
intellectual property blocks
Internet of Things
IoT
IP blocks
biblio
Scalability of CPU and GPU Solutions of the Prime Elliptic Curve Discrete Logarithm Problem
Submitted by grigby1 on Thu, 12/28/2017 - 12:40pm
Measurement
sequential algorithms
security scalability
Scalability
public key cryptography
pubcrawl
Pollard Rho
Partitioning algorithms
parallelism metrics
parallel processing
Parallel Collision Search based solution
parallel algorithms
microprocessor chips
big integer libraries
graphics processing units
GPU solutions
gpu
Elliptic curves
elliptic curve discrete logarithm problem
elliptic curve asymmetric cryptographic systems
ECDLP
Cryptography
cryptographic systems
CPU solutions
bit-length system
biblio
Embedded Accelerators for Scientific High-Performance Computing: An Energy Study of OpenCL Gaussian Elimination Workloads
Submitted by grigby1 on Mon, 12/04/2017 - 11:58am
high-performance supercomputers
ARM processors
Benchmark testing
Supercomputers
Compositionality
CPU
embedded accelerators
embedded systems
Energy Efficiency
Gaussian processes
gpu
graphics processing units
Hardware
high-performance computing
accelerators
HPC
low power devices
Matrices
Metrics
microprocessor chips
OpenCL Gaussian elimination workloads
parallel processing
performance evaluation
power aware computing
pubcrawl
Resiliency
Scientific Computing Security
biblio
A compact and efficient architecture for elliptic curve cryptographic processor
Submitted by grigby1 on Mon, 11/27/2017 - 11:06am
heterogeneous function units
word length 576 bit
UMC
size 90 nm
scalar multiplication
Resiliency
Registers
public key cryptography
pubcrawl
parallel processing
Montgomery modular division algorithm
microprocessor chips
Metrics
Kaliski's Montgomery modular inversion
arbitrary curves
hardware complexity
Hardware
Galois fields
Elliptic curve cryptography (ECC)
Elliptic curve cryptography
elliptic curve cryptographic processor
dual-field elliptic curve cryptographic processor
computer architecture
composability
CMOS integrated circuits
CMOS 1 P9M technology
clustering technology
Clustering algorithms
biblio
Static and dynamic malware behavioral analysis based on arm based board
Submitted by grigby1 on Wed, 03/08/2017 - 1:38pm
information system unauthorized use attempt detection
World Web application
static malware behavioral analysis
security
pubcrawl170114
network security
microprocessor chips
malicious activity detection
malicious activity analysis
invasive software
internet
ARM based board
honeypot engineering
honeypot
honeynet
HoneyD
Glasstopf
dynamic malware behavioral analysis
Dionaea
computer network security
CCFIS software
CCFIS sensor
biblio
Detecting untestable hardware Trojan with non-intrusive concurrent on line testing
Submitted by grigby1 on Wed, 03/08/2017 - 1:32pm
manufacturing testing
untestable hardware trojan
Trojan horses
security
Radiation detectors
pubcrawl170112
nonintrusive concurrent on line testing
Monitoring
microprocessor chips
built-in self-test
manufacturing stage
manufacturing cycle
integrated circuit testing
HT
Hardware
Europe
circuit geometrical characteristics
chip supply chain
biblio
Trends on EDA for low power
Submitted by grigby1 on Wed, 03/08/2017 - 12:54pm
state-of-the-art microprocessors
low-power electronics
microprocessor chips
optimization
Physical design
power consumption
Power demand
power optimization
pubcrawl170110
Low power
transistor circuits
transistor layout
transistor network
transistor sizing
Transistors
visualization
visualization tools
AD 2012
Logic gates
Libraries
layout design automation tool
Layout
ISPD Contest
integrated circuit layout
electronic design automation
EDA algorithms
EDA
discrete gate sizing
continuous gate sizing
cell library
Algorithms
Algorithm design and analysis
AD 2013
biblio
Hardware-assisted code obfuscation for FPGA soft microprocessors
Submitted by grigby1 on Mon, 02/27/2017 - 11:53am
many embedded FPGA system
Table lookup
Switches
software security
software confidentiality
Software
Soft microprocessor
security of data
pubcrawl170107
minimal hardware overhead
microprocessor chips
Code Obfuscation
hardware-software codesign
hardware assisted code obfuscation
Hardware
FPGA soft microprocessors
field programmable gate arrays
encryption
encoding
data dependent control flow modification
Complexity theory
« first
‹ previous
1
2
3
4
5
next ›
last »