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Cyber-Physical Systems Virtual Organization
Read-only archive of site from September 29, 2023.
CPS-VO
Hardware
biblio
Hardware Trojan Detection through Information Flow Security Verification
Submitted by grigby1 on Wed, 04/11/2018 - 3:00pm
Payloads
untrusted vendors
Trusted Computing
trust-hub benchmarks
Trojan horses
trojan horse detection
time-to-market constraints
security
Resiliency
resilience
pubcrawl
automatic test pattern generation
IP networks
invasive software
intellectual property
information flow security verification
industrial property
Hardware Trojan detection framework
Hardware
cyber physical systems
composability
Benchmark testing
biblio
Intra-Die-Variation-Aware Side Channel Analysis for Hardware Trojan Detection
Submitted by grigby1 on Wed, 04/11/2018 - 2:59pm
Sensitivity
logic testing
Power based Side-channel
Power measurement
probability
process variation levels
Process Variations
pubcrawl
relative power difference
resilience
Resiliency
logic circuits
sequential type Trojans
side channel analysis
spatial correlation
Systematics
test pattern generation
Trojan activation probability
trojan horse detection
Trojan horses
Trojan inserted circuits
hardware trojan
automatic test pattern generation
combinational type Trojans
composability
cyber physical systems
delays
Detection sensitivity
efficient Trojan detection approach
elevated process variations
Hardware
AES-128 circuit
hardware Trojan detection
high detection sensitivity
integrated circuit design
integrated circuit testing
integrated circuits
intra-die-variation
invasive software
ISCAS 89 benchmark
ITC 99 benchmark
biblio
A Novel Hardware Trojan Detection with Chip ID Based on Relative Time Delays
Submitted by grigby1 on Wed, 04/11/2018 - 2:59pm
pubcrawl
Wires
Trojan horses
trojan horse detection
transient based post-layout simulation
time-delay
side-channel signal
sensor chains
sensor chain
security
RTD
Resiliency
resilience
relative time delays
chip ID
NMOS
Layout
Inverters
Integrated circuit modeling
Integrated circuit interconnections
hardware Trojan detection method
hardware trojan
Hardware
golden chip
delays
cyber physical systems
composability
biblio
A General Framework of Hardware Trojan Detection: Two-Level Temperature Difference Based Thermal Map Analysis
Submitted by grigby1 on Wed, 04/11/2018 - 2:59pm
Temperature measurement
Mathematical model
normal circuits
operating chip
power proportion magnitude
pubcrawl
resilience
Resiliency
serious threats
Kalman filters
Thermal analysis
Thermal map analysis
thermal map analysis detection method
trojan horse detection
Trojan horses
two-level temperature difference
White noise
commercial chips
Kalman filter algorithm
Kalman filter
invasive software
Integrated circuit modeling
integrated circuit design
infrared imaging
hardware Trojan detection
Hardware
general framework
field programmable gate arrays
equivalent circuits
differential thermal maps
differential temperature
cyber physical systems
composability
biblio
Analysis of ICMetrics Features/Technology for Wearable Devices IOT Sensors
Submitted by grigby1 on Mon, 04/02/2018 - 12:55pm
key generation
wearables security
Wearable devices
wearable computers
Sports Activity Data
Software
sensors
security
Scalability
Resiliency
resilience
pubcrawl
privacy
online services
Accelerometers
IOT sensors
IoT
Internet of Things
ICmetrics
ICMetric
Human behavior
Hardware
feature extraction
encryption keys
encryption
Cryptography
authentication
Apple Watch
biblio
In-Depth Modeling of the UNIX Operating System for Architectural Cyber Security Analysis
Submitted by grigby1 on Mon, 04/02/2018 - 12:52pm
integrated modelling language
UNIX operating systems
UNIX operating system
Unix
self-replicating malware
Resiliency
resilience
pwnPr3d modelling approach
pubcrawl
operating systems
Metrics
invasive software
Analytical models
ICT systems
hardware components
Hardware
cybersecurity analysis
computer security
computer architecture
composability
attack graphs
architectural cyber security analysis
Architectural Analysis
biblio
Unified Approach for Operating System Comparisons with Windows OS Case Study
Submitted by grigby1 on Mon, 03/26/2018 - 12:58pm
Three-dimensional displays
operational level benchmarking
operational level performance
OS security features
pubcrawl
resilience
Resiliency
security
security of data
operating systems (computers)
unified approach
unified benchmarking approach
Windows 7
Windows 8
Windows operating system
Windows OS
Windows OS case study
Windows XP
graphics processing units
Benchmark testing
Benchmarking
composability
conventional personal computer
DirectX 11
efficient benchmark systems
gpu
Graphics
automated benchmarking tools
Hardware
hardware level
hardware technology
Metrics
microsoft windows
operating system
operating systems
biblio
Self-Healing Router Architecture for Reliable Network-on-Chips
Submitted by grigby1 on Mon, 03/05/2018 - 1:21pm
Circuit faults
composability
computer architecture
Evolvable hardware
Fault Tolerant
Hardware
NoCs
Ports (Computers)
pubcrawl
Redundancy
resilience
Resiliency
Routing
self-healing
self-healing networks
biblio
System architectural design of a hardware engine for moving target IPv6 defense over IEEE 802.3 Ethernet
Submitted by K_Hooper on Wed, 02/28/2018 - 11:38am
obscuration technique
Logic gates
Metrics
moving target defense
moving target IPv6 defense
MT6D processor
network address
network infrastructure
network level
network packet processor
network processor
network time protocol listener
keyed access
operating system kernel
operating system kernels
personal area networks
Protocols
pubcrawl
Register Transfer Level network security processor implementation
Resiliency
Routing protocols
RTL development
system architectural design
system level functions
federal networks
application specific integrated circuits
ASIC
CISC architecture
Clocks
collaboration
complex instruction set computer architecture
composability
computer network security
cryptographic dynamic addressing
Encapsulation
Engines
application specific integrated circuit variant
FPGA
Hardware
hardware engine
HE-MT6D
Homeland Security Cyber Security Division
IEEE 802.3 Ethernet
Instruction sets
internet
IP networks
IPv6
ipv6 security
biblio
One more queue is enough: Minimizing flow completion time with explicit priority notification
Submitted by grigby1 on Wed, 02/21/2018 - 1:49pm
Resiliency
packet switching
policy governance
Policy-Governed Secure Collaboration
Processor scheduling
pubcrawl
queue
queueing theory
resilience
Metrics
scheduling
scheduling mechanism
switch priority queues
Switches
TCP
telecommunication traffic
transport protocols
fine-grained priorities
clean slate
clean-slate switch hardware
collaboration
commodity switches
computer centres
Conferences
Dynamic scheduling
EPN
Bandwidth
flow completion time
flow scheduling
flow size information
Hardware
Human behavior
human factor
Human Factors
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