| Title | Enhanced Functional Obfuscation of DSP core using Flip-Flops and Combinational logic |
| Publication Type | Conference Paper |
| Year of Publication | 2019 |
| Authors | Rathor, M., Sengupta, A. |
| Conference Name | 2019 IEEE 9th International Conference on Consumer Electronics (ICCE-Berlin) |
| Date Published | sep |
| Keywords | block logic, combinational circuits, combinational logic, composability, Consumer electronics, consumer electronics systems, cryptography, digital signal processing chips, digital signal processing core, DSP, DSP core, DSP design, flip-flop, Flip-flops, functional obfuscation, functional obfuscation based security mechanism, functionally obfuscated design, hardware threats, IC design flow, ILB, industrial property, Integrated Circuit design flow, Intellectual Property cores, IP core, IP core locking block logic, IP piracy, logic design, policy-based governance, pubcrawl, Resiliency, Trojan insertion |
| Abstract | Due to globalization of Integrated Circuit (IC) design flow, Intellectual Property (IP) cores have increasingly become susceptible to various hardware threats such as Trojan insertion, piracy, overbuilding etc. An IP core can be secured against these threats using functional obfuscation based security mechanism. This paper presents a functional obfuscation of digital signal processing (DSP) core for consumer electronics systems using a novel IP core locking block (ILB) logic that leverages the structure of flip-flops and combinational circuits. These ILBs perform the locking of the functionality of a DSP design and actuate the correct functionality only on application of a valid key sequence. In existing approaches so far, executing exhaustive trials are sufficient to extract the valid keys from an obfuscated design. However, proposed work is capable of hindering the extraction of valid keys even on exhaustive trials, unless successfully applied in the first attempt only. In other words, the proposed work drastically reduces the probability of obtaining valid key of a functionally obfuscated design in exhaustive trials. Experimental results indicate that the proposed approach achieves higher security and lower design overhead than previous works. |
| DOI | 10.1109/ICCE-Berlin47944.2019.9127236 |
| Citation Key | rathor_enhanced_2019 |
Enhanced Functional Obfuscation of DSP core using Flip-Flops and Combinational logic