Skip to Main Content Area
CPS-VO
Contact Support
Browse
Calendar
Announcements
Repositories
Groups
Search
Search for Content
Search for a Group
Search for People
Search for a Project
Tagcloud
› Go to login screen
Not a member?
Click here to register!
Forgot username or password?
Cyber-Physical Systems Virtual Organization
Read-only archive of site from September 29, 2023.
CPS-VO
Logic gates
biblio
A Robust Malware Detection System Using Deep Learning on API Calls
Submitted by grigby1 on Fri, 03/27/2020 - 11:37am
cuckoo sandbox
robust malware detection system
redundant API
Object oriented modeling
neural nets
massive malware
massive datasets
malware detection
computer security
component
BLSTM
API sequences
API calls
API
Logic gates
application program interfaces
sandboxing
invasive software
malware
composability
policy-based governance
pubcrawl
Neural networks
feature extraction
collaboration
learning (artificial intelligence)
deep learning
biblio
HyperPS: A Hypervisor Monitoring Approach Based on Privilege Separation
Submitted by grigby1 on Fri, 03/27/2020 - 11:28am
security of data
policy-based governance
privilege separation
pubcrawl
Registers
resilience
Resiliency
Safe Coding
security
operating system kernels
security-sensitive system resources
system monitoring
system software error
Trusted Computing
trusted environment
Virtual machine monitors
virtual machines
Virtualization
Kernel
cloud environment
collaboration
guest virtual machine security
Human behavior
Human Factors
HyperPS
hypervisor monitoring
hypervisor security
Cloud Computing
KVM hypervisor
Linux
Logic gates
Metrics
microhypervisor reducing attack surface
Monitoring
monolithic operating system
biblio
SDN Enabled Secure IoT Architecture
Submitted by grigby1 on Wed, 03/18/2020 - 11:59am
authentication
computer architecture
control systems
Internet of Things
Logic gates
Protocols
pubcrawl
Science of Security
biblio
A Hierarchical Approach to Self-Timed Circuit Verification
Submitted by aekwall on Mon, 03/16/2020 - 10:39am
asynchronous circuit modeling
timing circuits
self-timed circuit verification
non deterministic behavior
mechanical theorem proving
link-joint style
link joint model
Latches
iterative self-timed circuits
hierarchical verification
hardware description language
greatest common divisor circuit model
greatest common divisor
flip-flops
combinational circuits
asynchronous circuit verification
Resiliency
arbitrated merge
ACL2 theorem prover
Theorem Proving
scalable verification
hardware description languages
Integrated circuit modeling
Wires
Compositionality
Predictive Metrics
Scalability
timing
Logic gates
Iterative methods
Computational modeling
pubcrawl
biblio
Input Elimination Transformations for Scalable Verification and Trace Reconstruction
Submitted by aekwall on Mon, 03/16/2020 - 10:38am
2QBF variant
verification scalability
verification complexity
trace reconstruction
scalable verification
netlist transformations
merging
input reparameterization
input elimination transformations
fast- lossy preprocess
Cost accounting
connectivity verification
Resiliency
model checking
formal verification
Registers
Compositionality
Predictive Metrics
Scalability
Logic gates
Complexity theory
computational complexity
pubcrawl
biblio
Quantum Cryptography on IBM QX
Submitted by grigby1 on Wed, 03/04/2020 - 4:13pm
quantum key distribution protocol
pubcrawl
quantum
quantum bit commitment
quantum computation
quantum computers
quantum computing security
quantum computing
quantum cryptography
Quantum Key Distribution
Protocols
quantum machines
quantum protocols
Qubit
Resiliency
Scalability
security shifts
statistical analysis
telecommunication security
theoretical cryptography
distributed keys
BB84 protocol
BB84 theoretical expected results
classical computers
composability
Compositionality
computational power
Cryptographic Protocols
cryptographic solutions
Cryptography
BB84
electronic transactions
encoding functions
existing classical algorithms 100% breakable
IBM QX software
intended parties
Logic gates
mathematical complexity
practical implementation results
Predictive Metrics
biblio
Increasing the SAT Attack Resiliency of In-Cone Logic Locking
Submitted by grigby1 on Wed, 02/26/2020 - 4:48pm
Logic gates
security
satisfiability attack
SAT attack resiliency
SAT attack
Resiliency
resilience
removal attack
pubcrawl
MFFC based algorithm
maximum fanout free cones
manufacturing
logic locking
provable security
logic design
key gate selection
Iterative methods
integrated logic circuits
integrated circuits
in-cone techniques
in-cone logic locking
Hardware Security
Hardware
Electronics packaging
circuit netlist
biblio
Golden Gates: A New Hybrid Approach for Rapid Hardware Trojan Detection Using Testing and Imaging
Submitted by grigby1 on Wed, 02/26/2020 - 4:38pm
Resiliency
Logic Test
low accuracy
malicious modifications
microscopy
modern military systems
new hybrid approach
pubcrawl
rapid hardware trojan detection
resilience
Logic gates
reverse engineering
scanning electron microscopy
security
SEM images
superlative accuracy
supply chain security
trojan horse detection
Trojan horses
grave threat
commercial systems
cyber physical systems
detection method
exhaustive test infrastructure
existing gate footprints
Foundries
GGC
golden chip
golden gate circuits
backside ultra thinning
Hardware
Hardware Trojans
high classification accuracy
high time cost
Image analysis
Imaging
integrated circuits
invasive software
biblio
Restricting Switching Activity Using Logic Locking to Improve Power Analysis-Based Trojan Detection
Submitted by grigby1 on Wed, 02/26/2020 - 4:38pm
pubcrawl
logic locking method
malicious circuits
million-gate circuits
outsourcing
PCA-based HT detection methods
power analysis-based Trojan detection
power consumption
power consumption analysis
Power demand
principal component analysis
Process Variations
logic locking
resilience
security
semiconductor companies
small sub-circuit collection
supply chain security
Switches
system-on-chip
trojan horse detection
Trojan horses
untrustworthy fabs
hardware Trojan detection
policy-based governance
composability
IP piracy
circuit block extraction
circuit power
cyber physical systems
design for hardware trust
fabrication foundries
gate level
Hardware
Hardware Security
Resiliency
hardware Trojan threat
HT activity
HT power
HT-infected circuits
industrial property
integrated circuit layout
intellectual properties
invasive software
IPS
Logic gates
biblio
Regaining Insight and Control on SMGW-based Secure Communication in Smart Grids
Submitted by aekwall on Mon, 02/17/2020 - 2:17pm
proxy
TLS
telecommunication security
SMGW-based secure communication control
smart power grids
smart meters
smart meter gateways
smart meter gateway
Smart Grids
smart grid security
Smart Grid
security
Scalability
Resiliency
Receivers
pubcrawl
case-specific security settings
privacy
power system security
power engineering computing
policy language
performance evaluation
network servers
Metrics
Logic gates
internetworking
Internet of Things
Data protection
critical smart grid infrastructure
communication security control
communication security
communication protection
« first
‹ previous
…
12
13
14
15
16
17
18
19
20
…
next ›
last »