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Cyber-Physical Systems Virtual Organization
Read-only archive of site from September 29, 2023.
CPS-VO
logic locking
biblio
ATPG-Guided Fault Injection Attacks on Logic Locking
Submitted by aekwall on Mon, 10/04/2021 - 1:53pm
Human behavior
pattern locks
semiconductor lasers
logic locking
laser theory
IP piracy
IC overproduction
Fault injection
differential fault analysis
Logic gates
Resiliency
Scalability
pubcrawl
resilience
tools
Circuit faults
security
biblio
SeqL: Secure Scan-Locking for IP Protection
Submitted by grigby1 on Wed, 08/11/2021 - 3:28pm
pubcrawl
policy-based governance
collaboration
resilience
Resiliency
composability
ip protection
IP piracy
logic locking
Scan-chains
biblio
Pitfalls in Machine Learning-based Adversary Modeling for Hardware Systems
Submitted by grigby1 on Thu, 01/28/2021 - 1:12pm
machine learning
Scalability
Root-of-trust
Resiliency
resilience
pubcrawl
Picture archiving and communication systems
physically unclonable functions
Metrics
machine learning-based attacks
machine learning-based adversary model
Adversary Models
logic locking
learning (artificial intelligence)
Human behavior
Hardware
Cryptography
cryptographic scheme
cryptanalysis attacks
Composed Hardware
Boolean functions
Approximation algorithms
biblio
DLockout: A Design Lockout Technique for Key Obfuscated RTL IP Designs
Submitted by aekwall on Mon, 11/09/2020 - 1:40pm
nondestructive manner
Datapath
datapath intensive IPs
Design Lockout
DLockout
key obfuscated RTL IP designs
key obfuscated RTL module
key obfuscation
key-based obfuscation techniques
legacy IP
common side-channel attacks
obfuscation logic output
overproduction
robust design lockout technique
RTL Obfuscation
semiconductor supply chain
storage capacity 128 bit
storage capacity 32 bit
storage capacity 64 bit
typical design corner
Computer crime
Cryptography
Hardware
security
Software
Resiliency
pubcrawl
composability
policy-based governance
logic locking
IP networks
process control
reverse engineering
Integrated circuit modeling
Registers
logic circuits
controller
IP piracy
applied key
biblio
A Novel PUF based Logic Encryption Technique to Prevent SAT Attacks and Trojan Insertion
Submitted by aekwall on Mon, 11/09/2020 - 1:33pm
intellectual property/IC
IP piracy
SAT attack
hardware obfuscation
Anti-Trojan insertion algorithm
Controllability
copy protection
design-for-trust
hardware Trojan insertion
HT insertion
hardware trojan
logic encryption methods
logic encryption techniques
logic locking
PUF based logic encryption technique
PUF-based encryption
Rare Signal
reverse engineering attack
unique encryption
Hardware Security
encryption
Hardware
invasive software
Resiliency
pubcrawl
composability
policy-based governance
Trojan horses
integrated circuits
Cryptography
Topology
Logic gates
industrial property
reverse engineering
integrated circuit design
logic circuits
Physical Unclonable Function
encryption key
biblio
Customized Locking of IP Blocks on a Multi-Million-Gate SoC
Submitted by aekwall on Mon, 11/09/2020 - 1:31pm
integrated circuit design
VLSI testing
Solid modeling
off-site untrusted fabrication facilities
multiple IP blocks
multimillion-gate SoC
IP block
integrated circuit manufacture
industrial designs
IP piracy
logic design
Erbium
IP networks
industrial property
Logic gates
integrated circuits
logic locking
policy-based governance
composability
pubcrawl
Resiliency
system-on-chip
security
Hardware
biblio
Is Robust Design-for-Security Robust Enough? Attack on Locked Circuits with Restricted Scan Chain Access
Submitted by aekwall on Tue, 09/08/2020 - 9:59am
locked circuits
Chained Attacks
working chip
unauthorized scan access
secret key recovery
scan chain
SAT attack
robust DFS technique
robust DFS design
robust design-for-security architecture
restricted scan chain access
logic locking security
logic locking attacks
Scalability
IP piracy
Boolean satisfiability based attack
benchmark circuits
ATPG
Boolean functions
logic circuits
computability
Security analysis
logic locking
pubcrawl
Resiliency
Cryptography
biblio
On the Impossibility of Approximation-Resilient Circuit Locking
Submitted by grigby1 on Thu, 03/12/2020 - 12:02pm
IC
signature based defense
security guarantees
Scalability
Resiliency
resilience
relaxed notion
pubcrawl
original circuit
microscopy
malicious foundry
long-standing hardness assumptions
logic locking
learning (artificial intelligence)
Integrated circuit modeling
Integrated Circuit Camouflaging
Adversary Models
Foundries
formally defined notions
formal approach
exponentially approximation-resilient
exact-recovery-resiliency
digital signatures
Cryptography
Computational modeling
cL
Boolean functions
boolean circuits
benchmark circuits
approximation-resilient Circuit locking
approximation-resiliency
algorithmic attacks
biblio
Increasing the SAT Attack Resiliency of In-Cone Logic Locking
Submitted by grigby1 on Wed, 02/26/2020 - 4:48pm
Logic gates
security
satisfiability attack
SAT attack resiliency
SAT attack
Resiliency
resilience
removal attack
pubcrawl
MFFC based algorithm
maximum fanout free cones
manufacturing
logic locking
provable security
logic design
key gate selection
Iterative methods
integrated logic circuits
integrated circuits
in-cone techniques
in-cone logic locking
Hardware Security
Hardware
Electronics packaging
circuit netlist
biblio
Restricting Switching Activity Using Logic Locking to Improve Power Analysis-Based Trojan Detection
Submitted by grigby1 on Wed, 02/26/2020 - 4:38pm
pubcrawl
logic locking method
malicious circuits
million-gate circuits
outsourcing
PCA-based HT detection methods
power analysis-based Trojan detection
power consumption
power consumption analysis
Power demand
principal component analysis
Process Variations
logic locking
resilience
security
semiconductor companies
small sub-circuit collection
supply chain security
Switches
system-on-chip
trojan horse detection
Trojan horses
untrustworthy fabs
hardware Trojan detection
policy-based governance
composability
IP piracy
circuit block extraction
circuit power
cyber physical systems
design for hardware trust
fabrication foundries
gate level
Hardware
Hardware Security
Resiliency
hardware Trojan threat
HT activity
HT power
HT-infected circuits
industrial property
integrated circuit layout
intellectual properties
invasive software
IPS
Logic gates
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